From patchwork Mon Dec 14 09:16:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 11971631 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42C01C2BB48 for ; Mon, 14 Dec 2020 09:20:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0B80B20771 for ; Mon, 14 Dec 2020 09:20:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2405135AbgLNJUb (ORCPT ); Mon, 14 Dec 2020 04:20:31 -0500 Received: from ns2.baikalelectronics.com ([94.125.187.42]:46540 "EHLO mail.baikalelectronics.ru" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2391714AbgLNJSk (ORCPT ); Mon, 14 Dec 2020 04:18:40 -0500 From: Serge Semin To: Rob Herring , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Johan Hovold , Maxime Ripard , Joao Pinto , Lars Persson , Maxime Coquelin CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , Vyacheslav Mitrofanov , , , , , Subject: [PATCH 24/25] net: stmmac: Use pclk to set MDC clock frequency Date: Mon, 14 Dec 2020 12:16:14 +0300 Message-ID: <20201214091616.13545-25-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20201214091616.13545-1-Sergey.Semin@baikalelectronics.ru> References: <20201214091616.13545-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org In accordance with [1] the MDC clock frequency is supposed to be selected with respect to the CSR clock frequency. CSR clock can be either tied to the DW MAC system clock (GMAC main clock) or supplied via a dedicated clk_csr_i signal. Current MDC clock selection procedure handles the former case while having no support of the later one. That's wrong for the devices which have separate system and CSR clocks. Let's fix it by first trying to get the synchro-signal rate from the "pclk" clock, if it hasn't been specified then fall-back to the "stmmaceth" clock. [1] DesignWare Cores Ethernet MAC Universal Databook, Revision 3.73a, October 2013, p. 424. Signed-off-by: Serge Semin --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 7f4d54d2fc72..719b00fd2a70 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -206,7 +206,12 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv) { u32 clk_rate; - clk_rate = clk_get_rate(priv->plat->stmmac_clk); + /* If APB clock has been specified then it is supposed to be used + * to select the CSR mode. Otherwise the application clock is the + * source of the periodic signal for the CSR interface. + */ + clk_rate = clk_get_rate(priv->plat->pclk) ?: + clk_get_rate(priv->plat->stmmac_clk); /* Platform provided default clk_csr would be assumed valid * for all other cases except for the below mentioned ones.