| Message ID | 20210208140341.9271-7-Sergey.Semin@baikalelectronics.ru (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | net: stmmac: Obvious cleanups and several fixes | expand |
| Context | Check | Description |
|---|---|---|
| netdev/tree_selection | success | Guessing tree name failed - patch did not apply |
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c index fc8759f146c7..6b9a4f54b93c 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c @@ -321,7 +321,7 @@ static int dwmac1000_irq_status(struct mac_device_info *hw, x->mmc_rx_irq_n++; if (unlikely(intr_status & GMAC_INT_STATUS_MMCCSUM)) x->mmc_rx_csum_offload_irq_n++; - if (unlikely(intr_status & GMAC_INT_DISABLE_PMT)) { + if (unlikely(intr_status & GMAC_INT_STATUS_PMT)) { /* clear the PMT bits 5 and 6 by reading the PMT status reg */ readl(ioaddr + GMAC_PMT); x->irq_receive_pmt_irq_n++;
For some reason the DW MAC1000-specific IRQ status handler has been using the GMAC_INT_DISABLE_PMT macro to test whether the PMT IRQ is pending in the MAC status register while there is a dedicated macro GMAC_INT_STATUS_PMT exists for the corresponding field to test. It didn't cause any error because the bits position match in both DW MAC IRQ mask and status registers, but semantically the code still doesn't look correct. Let's fix that by using the correct macro there. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> --- drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)