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[84.226.167.205]) by smtp.gmail.com with ESMTPSA id u20sm32781061wru.6.2021.03.10.00.38.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 00:38:51 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Catalin Marinas , Will Deacon , Dinh Nguyen , Rob Herring , Michael Turquette , Stephen Boyd , Moritz Fischer , Tom Rix , Lee Jones , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, arm@kernel.org, soc@kernel.org, Arnd Bergmann , Olof Johansson Cc: Krzysztof Kozlowski Subject: [RFC v2 5/5] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks Date: Wed, 10 Mar 2021 09:38:39 +0100 Message-Id: <20210310083840.481615-3-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210310083840.481615-1-krzysztof.kozlowski@canonical.com> References: <20210310083327.480837-1-krzysztof.kozlowski@canonical.com> <20210310083840.481615-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-State: RFC The Stratix 10 / Agilex / N5X clocks do not use anything other than OF or COMMON_CLK so they should be compile testable on most of the platforms. Signed-off-by: Krzysztof Kozlowski --- drivers/clk/Makefile | 5 +---- drivers/clk/socfpga/Kconfig | 17 ++++++++++++++--- 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index e34457539edf..9b582b3fca34 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -104,10 +104,7 @@ obj-y += renesas/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ -obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/ -obj-$(CONFIG_ARCH_AGILEX) += socfpga/ -obj-$(CONFIG_ARCH_N5X) += socfpga/ -obj-$(CONFIG_ARCH_SOCFPGA64) += socfpga/ +obj-y += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ obj-$(CONFIG_ARCH_STI) += st/ diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index 834797c68cb2..fb93b7cede27 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -1,6 +1,17 @@ # SPDX-License-Identifier: GPL-2.0 +config COMMON_CLK_SOCFPGA + bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_SOCFPGA && !ARCH_SOCFPGA64 + depends on ARCH_SOCFPGA || ARCH_SOCFPGA64 || COMPILE_TEST + default y if ARCH_SOCFPGA || ARCH_SOCFPGA64 + help + Support for the clock controllers present on Intel SoCFPGA and eASIC + devices like Stratix 10, Agilex and N5X eASIC. + +if COMMON_CLK_SOCFPGA + config COMMON_CLK_SOCFPGA64 - bool - # Intel Stratix / Agilex / N5X clock controller support + bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && !ARCH_SOCFPGA64 default y if ARCH_SOCFPGA64 - depends on ARCH_SOCFPGA64 + depends on ARCH_SOCFPGA64 || COMPILE_TEST + +endif # COMMON_CLK_SOCFPGA