| Message ID | 20210330024653.11062-1-vee.khee.wong@linux.intel.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 1c137d4777b5b66c64854ba469ab0650ff0dc5bd |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [net-next,1/1] stmmac: intel: add cross time-stamping freq difference adjustment | expand |
| Context | Check | Description |
|---|---|---|
| netdev/cover_letter | success | Link |
| netdev/fixes_present | success | Link |
| netdev/patch_count | success | Link |
| netdev/tree_selection | success | Clearly marked for net-next |
| netdev/subject_prefix | success | Link |
| netdev/cc_maintainers | success | CCed 9 of 9 maintainers |
| netdev/source_inline | success | Was 0 now: 0 |
| netdev/verify_signedoff | success | Link |
| netdev/module_param | success | Was 0 now: 0 |
| netdev/build_32bit | success | Errors and warnings before: 0 this patch: 0 |
| netdev/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| netdev/verify_fixes | success | Link |
| netdev/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 62 lines checked |
| netdev/build_allmodconfig_warn | success | Errors and warnings before: 0 this patch: 0 |
| netdev/header_inline | success | Link |
Hello: This patch was applied to netdev/net-next.git (refs/heads/master): On Tue, 30 Mar 2021 10:46:53 +0800 you wrote: > Cross time-stamping mechanism used in certain instance of Intel mGbE > may run at different clock frequency in comparison to the clock > frequency used by processor, so we introduce cross T/S frequency > adjustment to ensure TSC calculation is correct when processor got the > cross time-stamps. > > Signed-off-by: Wong Vee Khee <vee.khee.wong@linux.intel.com> > > [...] Here is the summary with links: - [net-next,1/1] stmmac: intel: add cross time-stamping freq difference adjustment https://git.kernel.org/netdev/net-next/c/1c137d4777b5 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 08b4852eed4c..3d9a57043af2 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -22,8 +22,13 @@ #define PCH_PTP_CLK_FREQ_19_2MHZ (GMAC_GPO0) #define PCH_PTP_CLK_FREQ_200MHZ (0) +/* Cross-timestamping defines */ +#define ART_CPUID_LEAF 0x15 +#define EHL_PSE_ART_MHZ 19200000 + struct intel_priv_data { int mdio_adhoc_addr; /* mdio address for serdes & etc */ + unsigned long crossts_adj; bool is_pse; }; @@ -340,9 +345,26 @@ static int intel_crosststamp(ktime_t *device, *system = convert_art_to_tsc(art_time); } + system->cycles *= intel_priv->crossts_adj; + return 0; } +static void intel_mgbe_pse_crossts_adj(struct intel_priv_data *intel_priv, + int base) +{ + if (boot_cpu_has(X86_FEATURE_ART)) { + unsigned int art_freq; + + /* On systems that support ART, ART frequency can be obtained + * from ECX register of CPUID leaf (0x15). + */ + art_freq = cpuid_ecx(ART_CPUID_LEAF); + do_div(art_freq, base); + intel_priv->crossts_adj = art_freq; + } +} + static void common_default_data(struct plat_stmmacenet_data *plat) { plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ @@ -551,6 +573,8 @@ static int ehl_pse0_common_data(struct pci_dev *pdev, plat->bus_id = 2; plat->addr64 = 32; + intel_mgbe_pse_crossts_adj(intel_priv, EHL_PSE_ART_MHZ); + return ehl_common_data(pdev, plat); } @@ -587,6 +611,8 @@ static int ehl_pse1_common_data(struct pci_dev *pdev, plat->bus_id = 3; plat->addr64 = 32; + intel_mgbe_pse_crossts_adj(intel_priv, EHL_PSE_ART_MHZ); + return ehl_common_data(pdev, plat); } @@ -913,6 +939,7 @@ static int intel_eth_pci_probe(struct pci_dev *pdev, plat->bsp_priv = intel_priv; intel_priv->mdio_adhoc_addr = INTEL_MGBE_ADHOC_ADDR; + intel_priv->crossts_adj = 1; /* Initialize all MSI vectors to invalid so that it can be set * according to platform data settings below.
Cross time-stamping mechanism used in certain instance of Intel mGbE may run at different clock frequency in comparison to the clock frequency used by processor, so we introduce cross T/S frequency adjustment to ensure TSC calculation is correct when processor got the cross time-stamps. Signed-off-by: Wong Vee Khee <vee.khee.wong@linux.intel.com> --- .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+)