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[net-next,08/14] mlxsw: reg: Add support for ratr_ipip6_entry_pack()

Message ID 20210923123700.885466-9-idosch@idosch.org (mailing list archive)
State Accepted
Commit c729ae8d6cbccfd70d8f209504f3d6f71df81351
Delegated to: Netdev Maintainers
Headers show
Series mlxsw: Add support for IP-in-IP with IPv6 underlay | expand

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netdev/checkpatch success total: 0 errors, 0 warnings, 0 checks, 12 lines checked
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Commit Message

Ido Schimmel Sept. 23, 2021, 12:36 p.m. UTC
From: Amit Cohen <amcohen@nvidia.com>

The RATR register is used to configure the Router Adjacency (next-hop)
Table.

For IP-in-IP entry, underlay destination IPv4 is saved as part of this
register and underlay destination IPv6 is saved by RIPS register and RATR
saves pointer to it.

Add function for setting IPv6 IP-in-IP configuration.

Signed-off-by: Amit Cohen <amcohen@nvidia.com>
Reviewed-by: Petr Machata <petrm@nvidia.com>
Signed-off-by: Ido Schimmel <idosch@nvidia.com>
---
 drivers/net/ethernet/mellanox/mlxsw/reg.h | 6 ++++++
 1 file changed, 6 insertions(+)
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Patch

diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index f9f614e3c57c..5cc4b1ee7e7b 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -7002,6 +7002,12 @@  static inline void mlxsw_reg_ratr_ipip4_entry_pack(char *payload, u32 ipv4_udip)
 	mlxsw_reg_ratr_ipip_ipv4_udip_set(payload, ipv4_udip);
 }
 
+static inline void mlxsw_reg_ratr_ipip6_entry_pack(char *payload, u32 ipv6_ptr)
+{
+	mlxsw_reg_ratr_ipip_type_set(payload, MLXSW_REG_RATR_IPIP_TYPE_IPV6);
+	mlxsw_reg_ratr_ipip_ipv6_ptr_set(payload, ipv6_ptr);
+}
+
 static inline void mlxsw_reg_ratr_counter_pack(char *payload, u64 counter_index,
 					       bool counter_enable)
 {