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[187.49.235.234]) by smtp.gmail.com with ESMTPSA id m23sm9790229oos.6.2022.01.27.22.06.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jan 2022 22:06:13 -0800 (PST) From: Luiz Angelo Daros de Luca To: netdev@vger.kernel.org Cc: linus.walleij@linaro.org, andrew@lunn.ch, vivien.didelot@gmail.com, f.fainelli@gmail.com, olteanv@gmail.com, alsi@bang-olufsen.dk, arinc.unal@arinc9.com, frank-w@public-files.de, davem@davemloft.net, kuba@kernel.org, Luiz Angelo Daros de Luca Subject: [PATCH net-next v6 10/13] net: dsa: realtek: rtl8365mb: add RTL8367S support Date: Fri, 28 Jan 2022 03:05:06 -0300 Message-Id: <20220128060509.13800-11-luizluca@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220128060509.13800-1-luizluca@gmail.com> References: <20220128060509.13800-1-luizluca@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Realtek's RTL8367S, a 5+2 port 10/100/1000M Ethernet switch. It shares the same driver family (RTL8367C) with other models as the RTL8365MB-VC. Its compatible string is "realtek,rtl8367s". It was tested only with MDIO interface (realtek-mdio), although it might work out-of-the-box with SMI interface (using realtek-smi). This patch was based on an unpublished patch from Alvin Šipraga . Signed-off-by: Luiz Angelo Daros de Luca Tested-by: Arınç ÜNAL Reviewed-by: Alvin Šipraga Reviewed-by: Florian Fainelli --- drivers/net/dsa/realtek/Kconfig | 2 +- drivers/net/dsa/realtek/realtek-mdio.c | 1 + drivers/net/dsa/realtek/realtek-smi.c | 4 +++ drivers/net/dsa/realtek/rtl8365mb.c | 42 +++++++++++++++++++------- 4 files changed, 37 insertions(+), 12 deletions(-) diff --git a/drivers/net/dsa/realtek/Kconfig b/drivers/net/dsa/realtek/Kconfig index 553f696e7435..5242698143d9 100644 --- a/drivers/net/dsa/realtek/Kconfig +++ b/drivers/net/dsa/realtek/Kconfig @@ -32,7 +32,7 @@ config NET_DSA_REALTEK_RTL8365MB depends on NET_DSA_REALTEK_SMI || NET_DSA_REALTEK_MDIO select NET_DSA_TAG_RTL8_4 help - Select to enable support for Realtek RTL8365MB + Select to enable support for Realtek RTL8365MB-VC and RTL8367S. config NET_DSA_REALTEK_RTL8366RB tristate "Realtek RTL8366RB switch subdriver" diff --git a/drivers/net/dsa/realtek/realtek-mdio.c b/drivers/net/dsa/realtek/realtek-mdio.c index b82f96668218..0c5f2bdced9d 100644 --- a/drivers/net/dsa/realtek/realtek-mdio.c +++ b/drivers/net/dsa/realtek/realtek-mdio.c @@ -206,6 +206,7 @@ static const struct of_device_id realtek_mdio_of_match[] = { #endif #if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8365MB) { .compatible = "realtek,rtl8365mb", .data = &rtl8365mb_variant, }, + { .compatible = "realtek,rtl8367s", .data = &rtl8365mb_variant, }, #endif { /* sentinel */ }, }; diff --git a/drivers/net/dsa/realtek/realtek-smi.c b/drivers/net/dsa/realtek/realtek-smi.c index 1ef147e55a4c..946fbbd70153 100644 --- a/drivers/net/dsa/realtek/realtek-smi.c +++ b/drivers/net/dsa/realtek/realtek-smi.c @@ -510,6 +510,10 @@ static const struct of_device_id realtek_smi_of_match[] = { .compatible = "realtek,rtl8365mb", .data = &rtl8365mb_variant, }, + { + .compatible = "realtek,rtl8367s", + .data = &rtl8365mb_variant, + }, #endif { /* sentinel */ }, }; diff --git a/drivers/net/dsa/realtek/rtl8365mb.c b/drivers/net/dsa/realtek/rtl8365mb.c index d580afc04b8d..6974decf5ebe 100644 --- a/drivers/net/dsa/realtek/rtl8365mb.c +++ b/drivers/net/dsa/realtek/rtl8365mb.c @@ -102,15 +102,22 @@ #include "realtek.h" /* Chip-specific data and limits */ -#define RTL8365MB_CHIP_ID_8365MB_VC 0x6367 -#define RTL8365MB_LEARN_LIMIT_MAX_8365MB_VC 2112 -static const int rtl8365mb_extint_port_map[] = { -1, -1, -1, -1, -1, -1, 1 }; +#define RTL8365MB_CHIP_ID_8365MB_VC 0x6367 +#define RTL8365MB_CHIP_VER_8365MB_VC 0x0040 + +#define RTL8365MB_CHIP_ID_8367S 0x6367 +#define RTL8365MB_CHIP_VER_8367S 0x00A0 /* Family-specific data and limits */ -#define RTL8365MB_PHYADDRMAX 7 -#define RTL8365MB_NUM_PHYREGS 32 -#define RTL8365MB_PHYREGMAX (RTL8365MB_NUM_PHYREGS - 1) -#define RTL8365MB_MAX_NUM_PORTS 7 +#define RTL8365MB_PHYADDRMAX 7 +#define RTL8365MB_NUM_PHYREGS 32 +#define RTL8365MB_PHYREGMAX (RTL8365MB_NUM_PHYREGS - 1) +/* RTL8370MB and RTL8310SR, possibly suportable by this driver, have 10 ports */ +#define RTL8365MB_MAX_NUM_PORTS 10 +#define RTL8365MB_LEARN_LIMIT_MAX 2112 + +/* valid for all 6-port or less variants */ +static const int rtl8365mb_extint_port_map[] = { -1, -1, -1, -1, -1, -1, 1, 2, -1, -1}; /* Chip identification registers */ #define RTL8365MB_CHIP_ID_REG 0x1300 @@ -1966,9 +1973,22 @@ static int rtl8365mb_detect(struct realtek_priv *priv) switch (chip_id) { case RTL8365MB_CHIP_ID_8365MB_VC: - dev_info(priv->dev, - "found an RTL8365MB-VC switch (ver=0x%04x)\n", - chip_ver); + switch (chip_ver) { + case RTL8365MB_CHIP_VER_8365MB_VC: + dev_info(priv->dev, + "found an RTL8365MB-VC switch (ver=0x%04x)\n", + chip_ver); + break; + case RTL8365MB_CHIP_VER_8367S: + dev_info(priv->dev, + "found an RTL8367S switch (ver=0x%04x)\n", + chip_ver); + break; + default: + dev_err(priv->dev, "unrecognized switch version (ver=0x%04x)", + chip_ver); + return -ENODEV; + } priv->num_ports = RTL8365MB_MAX_NUM_PORTS; @@ -1976,7 +1996,7 @@ static int rtl8365mb_detect(struct realtek_priv *priv) mb->chip_id = chip_id; mb->chip_ver = chip_ver; mb->port_mask = GENMASK(priv->num_ports - 1, 0); - mb->learn_limit_max = RTL8365MB_LEARN_LIMIT_MAX_8365MB_VC; + mb->learn_limit_max = RTL8365MB_LEARN_LIMIT_MAX; mb->jam_table = rtl8365mb_init_jam_8365mb_vc; mb->jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc);