Message ID | 20220228140510.20883-4-arun.ramadoss@microchip.com (mailing list archive) |
---|---|
State | RFC |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | Add support for LAN937x T1 Phy | expand |
Context | Check | Description |
---|---|---|
netdev/tree_selection | success | Clearly marked for net-next |
netdev/fixes_present | success | Fixes tag not required for -next series |
netdev/subject_prefix | success | Link |
netdev/cover_letter | success | Series has a cover letter |
netdev/patch_count | success | Link |
netdev/header_inline | success | No static functions without inline keyword in header files |
netdev/build_32bit | success | Errors and warnings before: 0 this patch: 0 |
netdev/cc_maintainers | success | CCed 6 of 6 maintainers |
netdev/build_clang | success | Errors and warnings before: 0 this patch: 0 |
netdev/module_param | success | Was 0 now: 0 |
netdev/verify_signedoff | success | Signed-off-by tag matches author and committer |
netdev/verify_fixes | success | No Fixes tag |
netdev/build_allmodconfig_warn | success | Errors and warnings before: 0 this patch: 0 |
netdev/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 90 lines checked |
netdev/kdoc | success | Errors and warnings before: 0 this patch: 0 |
netdev/source_inline | success | Was 0 now: 0 |
On Mon, Feb 28, 2022 at 07:35:09PM +0530, Arun Ramadoss wrote: > LAN937x T1 Phy is based on LAN87xx Phy, so reusing the init script of > the Lan87xx. There is a workaround in accessing the DSP bank register > for Lan937x Phy. Whenever there is a bank switch to DSP registers, then > we need a dummy read access before proceeding to the actual register > access. > > Signed-off-by: Prasanna Vengateshan <prasanna.vengateshan@microchip.com> > Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> > --- > drivers/net/phy/microchip_t1.c | 47 +++++++++++++++++++++++++++++++--- > 1 file changed, 44 insertions(+), 3 deletions(-) > > diff --git a/drivers/net/phy/microchip_t1.c b/drivers/net/phy/microchip_t1.c > index 33325e5bd884..634a1423182a 100644 > --- a/drivers/net/phy/microchip_t1.c > +++ b/drivers/net/phy/microchip_t1.c > @@ -10,6 +10,7 @@ > #include <linux/ethtool_netlink.h> > > #define LAN87XX_PHY_ID 0x0007c150 > +#define LAN937X_T1_PHY_ID 0x0007c181 I guess the last 1 is meaningless, given the mask? Andrew
On Wed, 2022-03-02 at 04:22 +0100, Andrew Lunn wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you > know the content is safe > > On Mon, Feb 28, 2022 at 07:35:09PM +0530, Arun Ramadoss wrote: > > LAN937x T1 Phy is based on LAN87xx Phy, so reusing the init script > > of > > the Lan87xx. There is a workaround in accessing the DSP bank > > register > > for Lan937x Phy. Whenever there is a bank switch to DSP registers, > > then > > we need a dummy read access before proceeding to the actual > > register > > access. > > > > Signed-off-by: Prasanna Vengateshan < > > prasanna.vengateshan@microchip.com> > > Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> > > --- > > drivers/net/phy/microchip_t1.c | 47 > > +++++++++++++++++++++++++++++++--- > > 1 file changed, 44 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/net/phy/microchip_t1.c > > b/drivers/net/phy/microchip_t1.c > > index 33325e5bd884..634a1423182a 100644 > > --- a/drivers/net/phy/microchip_t1.c > > +++ b/drivers/net/phy/microchip_t1.c > > @@ -10,6 +10,7 @@ > > #include <linux/ethtool_netlink.h> > > > > #define LAN87XX_PHY_ID 0x0007c150 > > +#define LAN937X_T1_PHY_ID 0x0007c181 > > I guess the last 1 is meaningless, given the mask? Thanks Andrew for the comment. I will make 3:0 bits of phy_id to 0. > > Andrew
diff --git a/drivers/net/phy/microchip_t1.c b/drivers/net/phy/microchip_t1.c index 33325e5bd884..634a1423182a 100644 --- a/drivers/net/phy/microchip_t1.c +++ b/drivers/net/phy/microchip_t1.c @@ -10,6 +10,7 @@ #include <linux/ethtool_netlink.h> #define LAN87XX_PHY_ID 0x0007c150 +#define LAN937X_T1_PHY_ID 0x0007c181 #define MICROCHIP_PHY_ID_MASK 0xfffffff0 /* External Register Control Register */ @@ -76,8 +77,12 @@ #define T1_EQ_WT_FD_LCK_FRZ_CFG 0x6D #define T1_PST_EQ_LCK_STG1_FRZ_CFG 0x6E +#define T1_REG_BANK_SEL_MASK 0x7 +#define T1_REG_BANK_SEL 8 +#define T1_REG_ADDR_MASK 0xFF + #define DRIVER_AUTHOR "Nisar Sayed <nisar.sayed@microchip.com>" -#define DRIVER_DESC "Microchip LAN87XX T1 PHY driver" +#define DRIVER_DESC "Microchip LAN87XX/LAN937x T1 PHY driver" struct access_ereg_val { u8 mode; @@ -115,6 +120,32 @@ static int access_ereg(struct phy_device *phydev, u8 mode, u8 bank, ereg |= (bank << 8) | offset; + /* DSP bank access workaround for lan937x */ + if (phydev->phy_id == LAN937X_T1_PHY_ID) { + u8 prev_bank; + u16 val; + + /* Read previous selected bank */ + rc = phy_read(phydev, LAN87XX_EXT_REG_CTL); + if (rc < 0) + return rc; + + /* store the prev_bank */ + prev_bank = (rc >> T1_REG_BANK_SEL) & T1_REG_BANK_SEL_MASK; + + if (bank != prev_bank && bank == PHYACC_ATTR_BANK_DSP) { + val = ereg & ~T1_REG_ADDR_MASK; + + val &= ~LAN87XX_EXT_REG_CTL_WR_CTL; + val |= LAN87XX_EXT_REG_CTL_RD_CTL; + + /* access twice for DSP bank change,dummy access */ + rc = phy_write(phydev, LAN87XX_EXT_REG_CTL, val); + if (rc < 0) + return rc; + } + } + rc = phy_write(phydev, LAN87XX_EXT_REG_CTL, ereg); if (rc < 0) return rc; @@ -397,7 +428,7 @@ static irqreturn_t lan87xx_handle_interrupt(struct phy_device *phydev) return IRQ_HANDLED; } -static int lan87xx_config_init(struct phy_device *phydev) +static int lan_phy_config_init(struct phy_device *phydev) { int rc = lan87xx_phy_init(phydev); @@ -642,13 +673,22 @@ static struct phy_driver microchip_t1_phy_driver[] = { .name = "LAN87xx T1", .flags = PHY_POLL_CABLE_TEST, .features = PHY_BASIC_T1_FEATURES, - .config_init = lan87xx_config_init, + .config_init = lan_phy_config_init, .config_intr = lan87xx_phy_config_intr, .handle_interrupt = lan87xx_handle_interrupt, .suspend = genphy_suspend, .resume = genphy_resume, .cable_test_start = lan87xx_cable_test_start, .cable_test_get_status = lan87xx_cable_test_get_status, + }, + { + .phy_id = LAN937X_T1_PHY_ID, + .phy_id_mask = MICROCHIP_PHY_ID_MASK, + .name = "LAN937x T1", + .features = PHY_BASIC_T1_FEATURES, + .config_init = lan_phy_config_init, + .suspend = genphy_suspend, + .resume = genphy_resume, } }; @@ -656,6 +696,7 @@ module_phy_driver(microchip_t1_phy_driver); static struct mdio_device_id __maybe_unused microchip_t1_tbl[] = { { LAN87XX_PHY_ID, MICROCHIP_PHY_ID_MASK}, + { LAN937X_T1_PHY_ID, MICROCHIP_PHY_ID_MASK}, { } };