From patchwork Tue Apr 12 06:56:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dylan Hung X-Patchwork-Id: 12810225 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D20F9C433F5 for ; Tue, 12 Apr 2022 07:59:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244429AbiDLIBM (ORCPT ); Tue, 12 Apr 2022 04:01:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45880 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353424AbiDLHPV (ORCPT ); Tue, 12 Apr 2022 03:15:21 -0400 Received: from twspam01.aspeedtech.com (twspam01.aspeedtech.com [211.20.114.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E7BE9396A3; Mon, 11 Apr 2022 23:56:56 -0700 (PDT) Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 23C6gdFx026337; Tue, 12 Apr 2022 14:42:39 +0800 (GMT-8) (envelope-from dylan_hung@aspeedtech.com) Received: from DylanHung-PC.aspeed.com (192.168.2.216) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 12 Apr 2022 14:54:19 +0800 From: Dylan Hung To: , , , , , , , , , , , , , , , CC: Subject: [PATCH v4 3/3] ARM: dts: aspeed: add reset properties into MDIO nodes Date: Tue, 12 Apr 2022 14:56:11 +0800 Message-ID: <20220412065611.8930-4-dylan_hung@aspeedtech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220412065611.8930-1-dylan_hung@aspeedtech.com> References: <20220412065611.8930-1-dylan_hung@aspeedtech.com> MIME-Version: 1.0 X-Originating-IP: [192.168.2.216] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 23C6gdFx026337 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add reset control properties into MDIO nodes. The 4 MDIO controllers in AST2600 SOC share one reset control bit SCU50[3]. Signed-off-by: Dylan Hung Reviewed-by: Andrew Jeffery --- arch/arm/boot/dts/aspeed-g6.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index c32e87fad4dc..ab20ea8d829d 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -181,6 +181,7 @@ mdio0: mdio@1e650000 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mdio1_default>; + resets = <&syscon ASPEED_RESET_MII>; }; mdio1: mdio@1e650008 { @@ -191,6 +192,7 @@ mdio1: mdio@1e650008 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mdio2_default>; + resets = <&syscon ASPEED_RESET_MII>; }; mdio2: mdio@1e650010 { @@ -201,6 +203,7 @@ mdio2: mdio@1e650010 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mdio3_default>; + resets = <&syscon ASPEED_RESET_MII>; }; mdio3: mdio@1e650018 { @@ -211,6 +214,7 @@ mdio3: mdio@1e650018 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mdio4_default>; + resets = <&syscon ASPEED_RESET_MII>; }; mac0: ftgmac@1e660000 {