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[82.81.54.179]) by smtp.gmail.com with ESMTPSA id c13-20020adfa70d000000b0020c5253d8bfsm11880386wrd.11.2022.05.17.01.54.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 May 2022 01:54:51 -0700 (PDT) From: Josua Mayer To: netdev@vger.kernel.org Cc: alvaro.karsz@solid-run.com, Josua Mayer , Russell King , Rob Herring , Krzysztof Kozlowski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Subject: [PATCH v5 3/3] ARM: dts: imx6qdl-sr-som: update phy configuration for som revision 1.9 Date: Tue, 17 May 2022 11:54:31 +0300 Message-Id: <20220517085431.3895-3-josua@solid-run.com> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20220517085431.3895-1-josua@solid-run.com> References: <20220517085143.3749-1-josua@solid-run.com> <20220517085431.3895-1-josua@solid-run.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Since SoM revision 1.9 the PHY has been replaced with an ADIN1300, add an entry for it next to the original. As Russell King pointed out, additional phy nodes cause warnings like: mdio_bus 2188000.ethernet-1: MDIO device at address 1 is missing To avoid this the new node has its status set to disabled. U-Boot will be modified to enable the appropriate phy node after probing. The existing ar8035 nodes have to stay enabled by default to avoid breaking existing systems when they update Linux only. Co-developed-by: Alvaro Karsz Signed-off-by: Alvaro Karsz Signed-off-by: Josua Mayer --- V2 -> V3: new phy node status set disabled V1 -> V2: changed dts property name arch/arm/boot/dts/imx6qdl-sr-som.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi index f86efd0ccc40..ce543e325cd3 100644 --- a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi @@ -83,6 +83,16 @@ ethernet-phy@4 { qca,clk-out-frequency = <125000000>; qca,smarteee-tw-us-1g = <24>; }; + + /* + * ADIN1300 (som rev 1.9 or later) is always at address 1. It + * will be enabled automatically by U-Boot if detected. + */ + ethernet-phy@1 { + reg = <1>; + adi,phy-output-clock = "125mhz-free-running"; + status = "disabled"; + }; }; };