diff mbox series

[net-next] net: sparx5: Allow mdb entries to both CPU and ports

Message ID 20220614092532.3273791-1-casper.casan@gmail.com (mailing list archive)
State Accepted
Commit fbb89d02e33a8c8f522d75882f5f19c65b722b46
Delegated to: Netdev Maintainers
Headers show
Series [net-next] net: sparx5: Allow mdb entries to both CPU and ports | expand

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netdev/cover_letter success Single patches do not need cover letters
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netdev/header_inline success No static functions without inline keyword in header files
netdev/build_32bit success Errors and warnings before: 0 this patch: 0
netdev/cc_maintainers warning 2 maintainers not CCed: linux-arm-kernel@lists.infradead.org vladimir.oltean@nxp.com
netdev/build_clang success Errors and warnings before: 0 this patch: 0
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netdev/check_selftest success No net selftest shell script
netdev/verify_fixes success No Fixes tag
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Commit Message

Casper Andersson June 14, 2022, 9:25 a.m. UTC
Allow mdb entries to be forwarded to CPU and be switched at the same
time. Only remove entry when no port and the CPU isn't part of the group
anymore.

Signed-off-by: Casper Andersson <casper.casan@gmail.com>
---
 .../microchip/sparx5/sparx5_switchdev.c       | 55 ++++++++++++-------
 1 file changed, 35 insertions(+), 20 deletions(-)

Comments

Steen Hegelund June 15, 2022, 9:38 a.m. UTC | #1
Hi Casper,

Looks fine to me.

Acked-by: Steen Hegelund <Steen.Hegelund@microchip.com>

On Tue, 2022-06-14 at 11:25 +0200, Casper Andersson wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Allow mdb entries to be forwarded to CPU and be switched at the same
> time. Only remove entry when no port and the CPU isn't part of the group
> anymore.
> 
> Signed-off-by: Casper Andersson <casper.casan@gmail.com>
> ---
>  .../microchip/sparx5/sparx5_switchdev.c       | 55 ++++++++++++-------
>  1 file changed, 35 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c
> b/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c
> index 3429660cd2e5..40ef9fad3a77 100644
> --- a/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c
> +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c
> @@ -394,12 +394,10 @@ static int sparx5_handle_port_mdb_add(struct net_device *dev,
>         struct sparx5 *spx5 = port->sparx5;
>         u16 pgid_idx, vid;
>         u32 mact_entry;
> +       bool is_host;
>         int res, err;
> 
> -       if (netif_is_bridge_master(v->obj.orig_dev)) {
> -               sparx5_mact_learn(spx5, PGID_CPU, v->addr, v->vid);
> -               return 0;
> -       }
> +       is_host = netif_is_bridge_master(v->obj.orig_dev);
> 
>         /* When VLAN unaware the vlan value is not parsed and we receive vid 0.
>          * Fall back to bridge vid 1.
> @@ -416,17 +414,33 @@ static int sparx5_handle_port_mdb_add(struct net_device *dev,
> 
>                 /* MC_IDX starts after the port masks in the PGID table */
>                 pgid_idx += SPX5_PORTS;
> -               sparx5_pgid_update_mask(port, pgid_idx, true);
> +
> +               if (is_host)
> +                       spx5_rmw(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(1),
> +                                ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA, spx5,
> +                                ANA_AC_PGID_MISC_CFG(pgid_idx));
> +               else
> +                       sparx5_pgid_update_mask(port, pgid_idx, true);
> +
>         } else {
>                 err = sparx5_pgid_alloc_mcast(spx5, &pgid_idx);
>                 if (err) {
>                         netdev_warn(dev, "multicast pgid table full\n");
>                         return err;
>                 }
> -               sparx5_pgid_update_mask(port, pgid_idx, true);
> +
> +               if (is_host)
> +                       spx5_rmw(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(1),
> +                                ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA, spx5,
> +                                ANA_AC_PGID_MISC_CFG(pgid_idx));
> +               else
> +                       sparx5_pgid_update_mask(port, pgid_idx, true);
> +
>                 err = sparx5_mact_learn(spx5, pgid_idx, v->addr, vid);
> +
>                 if (err) {
>                         netdev_warn(dev, "could not learn mac address %pM\n", v->addr);
> +                       sparx5_pgid_free(spx5, pgid_idx);
>                         sparx5_pgid_update_mask(port, pgid_idx, false);
>                         return err;
>                 }
> @@ -463,13 +477,8 @@ static int sparx5_handle_port_mdb_del(struct net_device *dev,
>         struct sparx5_port *port = netdev_priv(dev);
>         struct sparx5 *spx5 = port->sparx5;
>         u16 pgid_idx, vid;
> -       u32 mact_entry, res, pgid_entry[3];
> -       int err;
> -
> -       if (netif_is_bridge_master(v->obj.orig_dev)) {
> -               sparx5_mact_forget(spx5, v->addr, v->vid);
> -               return 0;
> -       }
> +       u32 mact_entry, res, pgid_entry[3], misc_cfg;
> +       bool host_ena;
> 
>         if (!br_vlan_enabled(spx5->hw_bridge_dev))
>                 vid = 1;
> @@ -483,15 +492,21 @@ static int sparx5_handle_port_mdb_del(struct net_device *dev,
> 
>                 /* MC_IDX starts after the port masks in the PGID table */
>                 pgid_idx += SPX5_PORTS;
> -               sparx5_pgid_update_mask(port, pgid_idx, false);
> +
> +               if (netif_is_bridge_master(v->obj.orig_dev))
> +                       spx5_rmw(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(0),
> +                                ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA, spx5,
> +                                ANA_AC_PGID_MISC_CFG(pgid_idx));
> +               else
> +                       sparx5_pgid_update_mask(port, pgid_idx, false);
> +
> +               misc_cfg = spx5_rd(spx5, ANA_AC_PGID_MISC_CFG(pgid_idx));
> +               host_ena = ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_GET(misc_cfg);
> 
>                 sparx5_pgid_read_mask(spx5, pgid_idx, pgid_entry);
> -               if (bitmap_empty((unsigned long *)pgid_entry, SPX5_PORTS)) {
> -                       /* No ports are in MC group. Remove entry */
> -                       err = sparx5_mdb_del_entry(dev, spx5, v->addr, vid, pgid_idx);
> -                       if (err)
> -                               return err;
> -               }
> +               if (bitmap_empty((unsigned long *)pgid_entry, SPX5_PORTS) && !host_ena)
> +                       /* No ports or CPU are in MC group. Remove entry */
> +                       return sparx5_mdb_del_entry(dev, spx5, v->addr, vid, pgid_idx);
>         }
> 
>         return 0;
> --
> 2.30.2
>
patchwork-bot+netdevbpf@kernel.org June 15, 2022, 12:10 p.m. UTC | #2
Hello:

This patch was applied to netdev/net-next.git (master)
by David S. Miller <davem@davemloft.net>:

On Tue, 14 Jun 2022 11:25:32 +0200 you wrote:
> Allow mdb entries to be forwarded to CPU and be switched at the same
> time. Only remove entry when no port and the CPU isn't part of the group
> anymore.
> 
> Signed-off-by: Casper Andersson <casper.casan@gmail.com>
> ---
>  .../microchip/sparx5/sparx5_switchdev.c       | 55 ++++++++++++-------
>  1 file changed, 35 insertions(+), 20 deletions(-)

Here is the summary with links:
  - [net-next] net: sparx5: Allow mdb entries to both CPU and ports
    https://git.kernel.org/netdev/net-next/c/fbb89d02e33a

You are awesome, thank you!
diff mbox series

Patch

diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c b/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c
index 3429660cd2e5..40ef9fad3a77 100644
--- a/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c
+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c
@@ -394,12 +394,10 @@  static int sparx5_handle_port_mdb_add(struct net_device *dev,
 	struct sparx5 *spx5 = port->sparx5;
 	u16 pgid_idx, vid;
 	u32 mact_entry;
+	bool is_host;
 	int res, err;
 
-	if (netif_is_bridge_master(v->obj.orig_dev)) {
-		sparx5_mact_learn(spx5, PGID_CPU, v->addr, v->vid);
-		return 0;
-	}
+	is_host = netif_is_bridge_master(v->obj.orig_dev);
 
 	/* When VLAN unaware the vlan value is not parsed and we receive vid 0.
 	 * Fall back to bridge vid 1.
@@ -416,17 +414,33 @@  static int sparx5_handle_port_mdb_add(struct net_device *dev,
 
 		/* MC_IDX starts after the port masks in the PGID table */
 		pgid_idx += SPX5_PORTS;
-		sparx5_pgid_update_mask(port, pgid_idx, true);
+
+		if (is_host)
+			spx5_rmw(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(1),
+				 ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA, spx5,
+				 ANA_AC_PGID_MISC_CFG(pgid_idx));
+		else
+			sparx5_pgid_update_mask(port, pgid_idx, true);
+
 	} else {
 		err = sparx5_pgid_alloc_mcast(spx5, &pgid_idx);
 		if (err) {
 			netdev_warn(dev, "multicast pgid table full\n");
 			return err;
 		}
-		sparx5_pgid_update_mask(port, pgid_idx, true);
+
+		if (is_host)
+			spx5_rmw(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(1),
+				 ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA, spx5,
+				 ANA_AC_PGID_MISC_CFG(pgid_idx));
+		else
+			sparx5_pgid_update_mask(port, pgid_idx, true);
+
 		err = sparx5_mact_learn(spx5, pgid_idx, v->addr, vid);
+
 		if (err) {
 			netdev_warn(dev, "could not learn mac address %pM\n", v->addr);
+			sparx5_pgid_free(spx5, pgid_idx);
 			sparx5_pgid_update_mask(port, pgid_idx, false);
 			return err;
 		}
@@ -463,13 +477,8 @@  static int sparx5_handle_port_mdb_del(struct net_device *dev,
 	struct sparx5_port *port = netdev_priv(dev);
 	struct sparx5 *spx5 = port->sparx5;
 	u16 pgid_idx, vid;
-	u32 mact_entry, res, pgid_entry[3];
-	int err;
-
-	if (netif_is_bridge_master(v->obj.orig_dev)) {
-		sparx5_mact_forget(spx5, v->addr, v->vid);
-		return 0;
-	}
+	u32 mact_entry, res, pgid_entry[3], misc_cfg;
+	bool host_ena;
 
 	if (!br_vlan_enabled(spx5->hw_bridge_dev))
 		vid = 1;
@@ -483,15 +492,21 @@  static int sparx5_handle_port_mdb_del(struct net_device *dev,
 
 		/* MC_IDX starts after the port masks in the PGID table */
 		pgid_idx += SPX5_PORTS;
-		sparx5_pgid_update_mask(port, pgid_idx, false);
+
+		if (netif_is_bridge_master(v->obj.orig_dev))
+			spx5_rmw(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(0),
+				 ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA, spx5,
+				 ANA_AC_PGID_MISC_CFG(pgid_idx));
+		else
+			sparx5_pgid_update_mask(port, pgid_idx, false);
+
+		misc_cfg = spx5_rd(spx5, ANA_AC_PGID_MISC_CFG(pgid_idx));
+		host_ena = ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_GET(misc_cfg);
 
 		sparx5_pgid_read_mask(spx5, pgid_idx, pgid_entry);
-		if (bitmap_empty((unsigned long *)pgid_entry, SPX5_PORTS)) {
-			/* No ports are in MC group. Remove entry */
-			err = sparx5_mdb_del_entry(dev, spx5, v->addr, vid, pgid_idx);
-			if (err)
-				return err;
-		}
+		if (bitmap_empty((unsigned long *)pgid_entry, SPX5_PORTS) && !host_ena)
+			/* No ports or CPU are in MC group. Remove entry */
+			return sparx5_mdb_del_entry(dev, spx5, v->addr, vid, pgid_idx);
 	}
 
 	return 0;