From patchwork Fri Jul 1 15:10:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun Ramadoss X-Patchwork-Id: 12903513 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60EF9C433EF for ; Fri, 1 Jul 2022 15:11:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231147AbiGAPLV (ORCPT ); Fri, 1 Jul 2022 11:11:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41350 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230250AbiGAPLS (ORCPT ); Fri, 1 Jul 2022 11:11:18 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 460D93DA7E; Fri, 1 Jul 2022 08:11:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1656688275; x=1688224275; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/4zAF9ttoJS2TjV1ny7XdJQp08J3H2eI9+Cy1JXdrw0=; b=kmm6TYl5p/A9WqXbCFJXl9Ev8aTzQNN4iFywSPjW/9zAlbRAVI5PgTIV bJ/UgIrwl/3ptlQc0SjFlUSDMc62b3E/3yVMm8RHmG3JAEsLkaYAiiuDS AJpC20pg+3fLXyzmQDw7vWryd8OhRa8EOc5/pdu6yxCFnXAzW20a33e5N UxutlOQJrosCxaxy2bQl7dAJFjHWzpgfrbhYGLr/ZlvvBZx1RvcHlE0tB md91yGUQuUmqmi6VOH1F44OjR4VyN+QHydJ2WyXsVUUHmsqcgwaNfNsK0 nb7yzIr3obzBr0Zj9CDkqL8Kc8rS/6qNehFSoibxD+jOVROi89foMChJY g==; X-IronPort-AV: E=Sophos;i="5.92,237,1650956400"; d="scan'208";a="102671212" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 01 Jul 2022 08:11:14 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Fri, 1 Jul 2022 08:11:12 -0700 Received: from CHE-LT-I17769U.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Fri, 1 Jul 2022 08:10:40 -0700 From: Arun Ramadoss To: , , , CC: Woojung Huh , , Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , "Rob Herring" , Krzysztof Kozlowski , Russell King , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Martin KaFai Lau , "Song Liu" , Yonghong Song , John Fastabend , KP Singh Subject: [Patch net-next v15 10/13] net: dsa: microchip: lan937x: add phylink_get_caps support Date: Fri, 1 Jul 2022 20:40:34 +0530 Message-ID: <20220701151034.29285-1-arun.ramadoss@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220701144652.10526-1-arun.ramadoss@microchip.com> References: <20220701144652.10526-1-arun.ramadoss@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The internal phy of the LAN937x are capable of 100Mbps Full duplex. The xMII port of switch is capable of 10Mbps Full & Half Duplex, 100Mbps Full & Half Duplex and 1000Mbps Half duplex. xMII port also supports Tx and Rx Flow control. Signed-off-by: Arun Ramadoss --- drivers/net/dsa/microchip/ksz_common.c | 1 + drivers/net/dsa/microchip/lan937x.h | 2 ++ drivers/net/dsa/microchip/lan937x_main.c | 12 ++++++++++++ 3 files changed, 15 insertions(+) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c index fb0de48a3f5e..ca7ca327285d 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -220,6 +220,7 @@ static const struct ksz_dev_ops lan937x_dev_ops = { .vlan_del = ksz9477_port_vlan_del, .mirror_add = ksz9477_port_mirror_add, .mirror_del = ksz9477_port_mirror_del, + .get_caps = lan937x_phylink_get_caps, .fdb_dump = ksz9477_fdb_dump, .fdb_add = ksz9477_fdb_add, .fdb_del = ksz9477_fdb_del, diff --git a/drivers/net/dsa/microchip/lan937x.h b/drivers/net/dsa/microchip/lan937x.h index 50563874600d..d4207e97a130 100644 --- a/drivers/net/dsa/microchip/lan937x.h +++ b/drivers/net/dsa/microchip/lan937x.h @@ -15,4 +15,6 @@ void lan937x_switch_exit(struct ksz_device *dev); void lan937x_r_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 *data); void lan937x_w_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 val); int lan937x_change_mtu(struct ksz_device *dev, int port, int new_mtu); +void lan937x_phylink_get_caps(struct ksz_device *dev, int port, + struct phylink_config *config); #endif diff --git a/drivers/net/dsa/microchip/lan937x_main.c b/drivers/net/dsa/microchip/lan937x_main.c index 5917cc11ba59..8cb46caf5340 100644 --- a/drivers/net/dsa/microchip/lan937x_main.c +++ b/drivers/net/dsa/microchip/lan937x_main.c @@ -312,6 +312,18 @@ int lan937x_change_mtu(struct ksz_device *dev, int port, int new_mtu) return 0; } +void lan937x_phylink_get_caps(struct ksz_device *dev, int port, + struct phylink_config *config) +{ + config->mac_capabilities = MAC_100FD; + + if (dev->info->supports_rgmii[port]) { + /* MII/RMII/RGMII ports */ + config->mac_capabilities |= MAC_ASYM_PAUSE | MAC_SYM_PAUSE | + MAC_100HD | MAC_10 | MAC_1000FD; + } +} + int lan937x_setup(struct dsa_switch *ds) { struct ksz_device *dev = ds->priv;