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Mon, 4 Jul 2022 02:15:56 +0000 From: Wei Fang To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, peng.fan@nxp.com, ping.bai@nxp.com, sudeep.holla@arm.com, linux-arm-kernel@lists.infradead.org, aisheng.dong@nxp.com Subject: [PATCH 3/3] arm64: dts: imx8ulp-evk: Add the fec support Date: Mon, 4 Jul 2022 20:10:56 +1000 Message-Id: <20220704101056.24821-4-wei.fang@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220704101056.24821-1-wei.fang@nxp.com> References: <20220704101056.24821-1-wei.fang@nxp.com> X-ClientProxiedBy: SG2PR01CA0155.apcprd01.prod.exchangelabs.com (2603:1096:4:8f::35) To AM9PR04MB9003.eurprd04.prod.outlook.com (2603:10a6:20b:40a::9) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a111651b-116c-41a4-5847-08da5d6320f6 X-MS-TrafficTypeDiagnostic: AM0PR04MB6819:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Wei Fang --- arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 42 +++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts index 33e84c4e9ed8..ac635022ab45 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts @@ -38,7 +38,49 @@ &usdhc0 { status = "okay"; }; +&clock_ext_ts { + /* External ts clock is 50MHZ from PHY on EVK board. */ + clock-frequency = <50000000>; +}; + +&fec { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_enet>; + pinctrl-1 = <&pinctrl_enet>; + assigned-clocks = <&cgc1 IMX8ULP_CLK_ENET_TS_SEL>; + assigned-clock-parents = <&clock_ext_ts>; + phy-mode = "rmii"; + phy-handle = <ðphy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy: ethernet-phy { + reg = <1>; + micrel,led-mode = <1>; + }; + }; +}; + &iomuxc1 { + pinctrl_enet: enetgrp { + fsl,pins = < + MX8ULP_PAD_PTE15__ENET0_MDC 0x43 + MX8ULP_PAD_PTE14__ENET0_MDIO 0x43 + MX8ULP_PAD_PTE17__ENET0_RXER 0x43 + MX8ULP_PAD_PTE18__ENET0_CRS_DV 0x43 + MX8ULP_PAD_PTF1__ENET0_RXD0 0x43 + MX8ULP_PAD_PTE20__ENET0_RXD1 0x43 + MX8ULP_PAD_PTE16__ENET0_TXEN 0x43 + MX8ULP_PAD_PTE23__ENET0_TXD0 0x43 + MX8ULP_PAD_PTE22__ENET0_TXD1 0x43 + MX8ULP_PAD_PTE19__ENET0_REFCLK 0x43 + MX8ULP_PAD_PTF10__ENET0_1588_CLKIN 0x43 + >; + }; + pinctrl_lpuart5: lpuart5grp { fsl,pins = < MX8ULP_PAD_PTF14__LPUART5_TX 0x3