From patchwork Wed Jul 6 03:44:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ratheesh Kannoth X-Patchwork-Id: 12907284 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F683C433EF for ; Wed, 6 Jul 2022 03:45:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231365AbiGFDpX (ORCPT ); Tue, 5 Jul 2022 23:45:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48102 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230444AbiGFDpR (ORCPT ); Tue, 5 Jul 2022 23:45:17 -0400 Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97A131D321; Tue, 5 Jul 2022 20:45:16 -0700 (PDT) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 265JFa5q015304; Tue, 5 Jul 2022 20:45:04 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=YnsedU+Ftq6alM1GYN7rPSqu+DGS05WX6/brzAZzLEU=; b=MHDS3Zm8/K7L+9PWQJXK2lYxxRyMFXHrnfvh6C5UmJTesG033shz0qCcOuvytqUuUWIn A8SR1PLSw/zSmRe91cSR+nx8KGo3jlcgNyps4iIoDsOUUZVDi49wl3hQPdoLZwBqdUDn PxRHfBlMeAu3+D1+jHB0MSko8LWwRnwTKmSra/UwlTMwt1k1u6u48PJmT2LyeU/M5MJY Zxnkj34TP4HR2mWoyIb7rBLRQ4PtO7H73ahyLkxGB0TPghKYG1jv8UN67SPjxhf7KcUZ Jo+oa9+v9tTSR63LXIxRthImnjb94k8oAtScJ6fP3xF8GyNC6ES/BGAehW5nr6c1zlqN Ww== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3h4ua4sfsm-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 05 Jul 2022 20:45:04 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 5 Jul 2022 20:45:02 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 5 Jul 2022 20:45:02 -0700 Received: from IPBU-BLR-SERVER1.marvell.com (IPBU-BLR-SERVER1.marvell.com [10.28.8.41]) by maili.marvell.com (Postfix) with ESMTP id C875F5B6942; Tue, 5 Jul 2022 20:44:59 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , Ratheesh Kannoth Subject: [PATCH V1 05/12] octeontx2-af: FLR handler for exact match table. Date: Wed, 6 Jul 2022 09:14:35 +0530 Message-ID: <20220706034442.2308670-6-rkannoth@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220706034442.2308670-1-rkannoth@marvell.com> References: <20220706034442.2308670-1-rkannoth@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: xgmv1eSJ3h0iNa5ABMmc5Js3a6gayZ4x X-Proofpoint-ORIG-GUID: xgmv1eSJ3h0iNa5ABMmc5Js3a6gayZ4x X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-06_02,2022-06-28_01,2022-06-22_01 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org FLR handler should remove/free all exact match table resources corresponding to each interface. Signed-off-by: Ratheesh Kannoth --- .../net/ethernet/marvell/octeontx2/af/rvu.c | 3 +++ .../marvell/octeontx2/af/rvu_npc_hash.c | 27 +++++++++++++++++++ .../marvell/octeontx2/af/rvu_npc_hash.h | 1 + 3 files changed, 31 insertions(+) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c index 1b6e9efbb8ec..88b9856a7b39 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c @@ -2555,6 +2555,9 @@ static void rvu_blklf_teardown(struct rvu *rvu, u16 pcifunc, u8 blkaddr) static void __rvu_flr_handler(struct rvu *rvu, u16 pcifunc) { + if (rvu_npc_exact_has_match_table(rvu)) + rvu_npc_exact_reset(rvu, pcifunc); + mutex_lock(&rvu->flr_lock); /* Reset order should reflect inter-block dependencies: * 1. Reset any packet/work sources (NIX, CPT, TIM) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c index ef790a54743a..25125e91a016 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c @@ -1170,6 +1170,33 @@ void rvu_npc_exact_disable_feature(struct rvu *rvu) rvu->hw->cap.npc_exact_match_enabled = false; } +/** + * rvu_npc_exact_reset - Delete and free all entry which match pcifunc. + * @rvu: resource virtualization unit. + * @pcifunc: PCI func to match. + */ +void rvu_npc_exact_reset(struct rvu *rvu, u16 pcifunc) +{ + struct npc_exact_table *table = rvu->hw->table; + struct npc_exact_table_entry *tmp, *iter; + u32 seq_id; + + mutex_lock(&table->lock); + list_for_each_entry_safe(iter, tmp, &table->lhead_gbl, glist) { + if (pcifunc != iter->pcifunc) + continue; + + seq_id = iter->seq_id; + dev_dbg(rvu->dev, "%s: resetting pcifun=%d seq_id=%u\n", __func__, + pcifunc, seq_id); + + mutex_unlock(&table->lock); + rvu_npc_exact_del_table_entry_by_id(rvu, seq_id); + mutex_lock(&table->lock); + } + mutex_unlock(&table->lock); +} + /** * rvu_npc_exact_init - initialize exact match table * @rvu: resource virtualization unit. diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h index 7adb5c5c5082..0a4aeddbadca 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h @@ -187,5 +187,6 @@ int rvu_npc_exact_init(struct rvu *rvu); bool rvu_npc_exact_can_disable_feature(struct rvu *rvu); void rvu_npc_exact_disable_feature(struct rvu *rvu); +void rvu_npc_exact_reset(struct rvu *rvu, u16 pcifunc); #endif /* RVU_NPC_HASH_H */