@@ -98,6 +98,7 @@ struct ksz_device {
struct regmap *regmap[3];
void *priv;
+ int irq;
struct gpio_desc *reset_gpio; /* Optional reset GPIO */
@@ -85,6 +85,8 @@ static int ksz_spi_probe(struct spi_device *spi)
if (ret)
return ret;
+ dev->irq = spi->irq;
+
ret = ksz_switch_register(dev);
/* Main DSA driver may not be started yet. */
@@ -23,6 +23,11 @@ static int lan937x_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)
return regmap_update_bits(dev->regmap[0], addr, bits, set ? bits : 0);
}
+static int lan937x_cfg32(struct ksz_device *dev, u32 addr, u32 bits, bool set)
+{
+ return regmap_update_bits(dev->regmap[2], addr, bits, set ? bits : 0);
+}
+
static int lan937x_port_cfg(struct ksz_device *dev, int port, int offset,
u8 bits, bool set)
{
@@ -285,6 +290,16 @@ void lan937x_config_cpu_port(struct dsa_switch *ds)
dsa_switch_for_each_user_port(dp, ds) {
ksz_port_stp_state_set(ds, dp->index, BR_STATE_DISABLED);
+
+ if (dev->info->internal_phy[dp->index]) {
+ /* Enable PORT Interrupt - active low */
+ lan937x_cfg32(dev, REG_SW_PORT_INT_MASK__4,
+ BIT(dp->index), false);
+
+ /* Enable PORT_PHY_INT interrupt - active low */
+ lan937x_port_cfg(dev, dp->index, REG_PORT_INT_MASK,
+ PORT_PHY_INT, false);
+ }
}
}
@@ -383,6 +398,50 @@ void lan937x_setup_rgmii_delay(struct ksz_device *dev, int port)
}
}
+static irqreturn_t lan937x_switch_irq_thread(int irq, void *dev_id)
+{
+ struct ksz_device *dev = dev_id;
+ irqreturn_t result = IRQ_NONE;
+ u32 data;
+ int ret;
+
+ /* Read global interrupt status register */
+ ret = ksz_read32(dev, REG_SW_INT_STATUS__4, &data);
+ if (ret)
+ return result;
+
+ if (data & POR_READY_INT) {
+ ret = ksz_write32(dev, REG_SW_INT_STATUS__4, POR_READY_INT);
+ if (ret)
+ return result;
+ }
+
+ return result;
+}
+
+static int lan937x_register_interrupt(struct ksz_device *dev)
+{
+ int ret;
+
+ if (dev->irq > 0) {
+ unsigned long irqflags =
+ irqd_get_trigger_type(irq_get_irq_data(dev->irq));
+
+ irqflags |= IRQF_ONESHOT;
+ irqflags |= IRQF_SHARED;
+ ret = devm_request_threaded_irq(dev->dev, dev->irq, NULL,
+ lan937x_switch_irq_thread,
+ irqflags, dev_name(dev->dev),
+ dev);
+ if (ret) {
+ dev_err(dev->dev, "failed to request IRQ.\n");
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
int lan937x_setup(struct dsa_switch *ds)
{
struct ksz_device *dev = ds->priv;
@@ -423,6 +482,10 @@ int lan937x_setup(struct dsa_switch *ds)
lan937x_cfg(dev, REG_SW_GLOBAL_OUTPUT_CTRL__1,
(SW_CLK125_ENB | SW_CLK25_ENB), true);
+ ret = lan937x_register_interrupt(dev);
+ if (ret)
+ return ret;
+
return 0;
}
@@ -118,6 +118,16 @@
/* Port Registers */
/* 0 - Operation */
+#define REG_PORT_INT_STATUS 0x001B
+#define REG_PORT_INT_MASK 0x001F
+
+#define PORT_TAS_INT BIT(5)
+#define PORT_QCI_INT BIT(4)
+#define PORT_SGMII_INT BIT(3)
+#define PORT_PTP_INT BIT(2)
+#define PORT_PHY_INT BIT(1)
+#define PORT_ACL_INT BIT(0)
+
#define REG_PORT_CTRL_0 0x0020
#define PORT_MAC_LOOPBACK BIT(7)
This patch enables the interrupts for internal phy link detection for LAN937x. The interrupt enable bits are active low. It first enables port interrupt and then port phy interrupt. Also patch register the irq thread and in the ISR routine it clears the POR_READY_STS bit. POR_READY_STS bit is write one clear bit and all other bit in the register are read only. Since phy interrupts are handled by the lan937x phy layer, switch interrupt routine does not read the phy layer interrupts. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> --- drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/ksz_spi.c | 2 + drivers/net/dsa/microchip/lan937x_main.c | 63 ++++++++++++++++++++++++ drivers/net/dsa/microchip/lan937x_reg.h | 10 ++++ 4 files changed, 76 insertions(+) base-commit: 623cd87006983935de6c2ad8e2d50e68f1b7d6e7