From patchwork Thu Aug 18 22:27:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Keller X-Patchwork-Id: 12948084 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 514EFC25B0E for ; Thu, 18 Aug 2022 22:28:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344564AbiHRW2W (ORCPT ); Thu, 18 Aug 2022 18:28:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48162 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243429AbiHRW2B (ORCPT ); Thu, 18 Aug 2022 18:28:01 -0400 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13370DB7DF for ; Thu, 18 Aug 2022 15:27:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660861678; x=1692397678; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VKsLiLCzajuuCA/rEPLQOHww5fmbTmDF04PnhPq0buc=; b=NZjKtZN0uq0PdHcusPT3iTFPKEcbvnKjHpNnfvaBsnWBSBr6F0Resvjr fJ20/1vE29ADldutpsaGkgXPdJV4/89OByJPk/mId8l2vwjKVSE4l3DBj bUPAGfdKJhRx4PQAQaPlLCekUseqsBDDSddP3pbhQuvlPIfZmrPDhlAp9 lkW9uisacSx2gUIHfX65YoibAA3NfWWU/i8fnfVKoukXt3JifT8lwx5Fj R9QvKCZG8X1WuDFlL5Da4w9Q3Z+pYZyoYxvy3QZw+sql3QGf2WK7zAtYm WN+uNoACjPwAewVavz/rkLHkxO6Dd1bBffKCLnM/QACcBqrym98p0IKiy Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10443"; a="275928713" X-IronPort-AV: E=Sophos;i="5.93,247,1654585200"; d="scan'208";a="275928713" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Aug 2022 15:27:54 -0700 X-IronPort-AV: E=Sophos;i="5.93,247,1654585200"; d="scan'208";a="558717092" Received: from jekeller-desk.amr.corp.intel.com (HELO jekeller-desk.jekeller.internal) ([10.166.241.7]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Aug 2022 15:27:53 -0700 From: Jacob Keller To: netdev@vger.kernel.org Cc: Jacob Keller , "K. Y. Srinivasan" , Haiyang Zhang , Stephen Hemminger , Wei Liu , Dexuan Cui , Tom Lendacky , Shyam Sundar S K , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Siva Reddy Kallam , Prashant Sreedharan , Michael Chan , Yisen Zhuang , Salil Mehta , Jesse Brandeburg , Tony Nguyen , Tariq Toukan , Saeed Mahameed , Leon Romanovsky , Bryan Whitehead , Sergey Shtylyov , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Vivek Thampi , VMware PV-Drivers Reviewers , Jie Wang , Guangbin Huang , Eran Ben Elisha , Aya Levin , Cai Huoqing , Biju Das , Lad Prabhakar , Phil Edworthy , Jiasheng Jiang , "Gustavo A. R. Silva" , Linus Walleij , Wan Jiabing , Lv Ruyi , Arnd Bergmann Subject: [net-next 08/14] ptp: mlx4: convert to .adjfine and adjust_by_scaled_ppm Date: Thu, 18 Aug 2022 15:27:36 -0700 Message-Id: <20220818222742.1070935-9-jacob.e.keller@intel.com> X-Mailer: git-send-email 2.37.1.394.gc50926e1f488 In-Reply-To: <20220818222742.1070935-1-jacob.e.keller@intel.com> References: <20220818222742.1070935-1-jacob.e.keller@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The mlx4 implementation of .adjfreq is implemented in terms of a straight forward "base * ppb / 1 billion" calculation. Convert this driver to .adjfine and use adjust_by_scaled_ppm to perform the calculation. Signed-off-by: Jacob Keller Cc: Tariq Toukan --- I do not have this hardware, and have only compile tested the change. drivers/net/ethernet/mellanox/mlx4/en_clock.c | 25 +++++++------------ 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx4/en_clock.c b/drivers/net/ethernet/mellanox/mlx4/en_clock.c index 024788549c25..bea75392087d 100644 --- a/drivers/net/ethernet/mellanox/mlx4/en_clock.c +++ b/drivers/net/ethernet/mellanox/mlx4/en_clock.c @@ -111,34 +111,27 @@ void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev) } /** - * mlx4_en_phc_adjfreq - adjust the frequency of the hardware clock + * mlx4_en_phc_adjfine - adjust the frequency of the hardware clock * @ptp: ptp clock structure - * @delta: Desired frequency change in parts per billion + * @delta: Desired frequency change in scaled parts per million * * Adjust the frequency of the PHC cycle counter by the indicated delta from * the base frequency. + * + * Scaled parts per million is ppm with a 16-bit binary fractional field. **/ -static int mlx4_en_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta) +static int mlx4_en_phc_adjfine(struct ptp_clock_info *ptp, long delta) { - u64 adj; - u32 diff, mult; - int neg_adj = 0; + u32 mult; unsigned long flags; struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev, ptp_clock_info); - if (delta < 0) { - neg_adj = 1; - delta = -delta; - } - mult = mdev->nominal_c_mult; - adj = mult; - adj *= delta; - diff = div_u64(adj, 1000000000ULL); + mult = (u32)adjust_by_scaled_ppm(mdev->nominal_c_mult, delta); write_seqlock_irqsave(&mdev->clock_lock, flags); timecounter_read(&mdev->clock); - mdev->cycles.mult = neg_adj ? mult - diff : mult + diff; + mdev->cycles.mult = mult; write_sequnlock_irqrestore(&mdev->clock_lock, flags); return 0; @@ -237,7 +230,7 @@ static const struct ptp_clock_info mlx4_en_ptp_clock_info = { .n_per_out = 0, .n_pins = 0, .pps = 0, - .adjfreq = mlx4_en_phc_adjfreq, + .adjfine = mlx4_en_phc_adjfine, .adjtime = mlx4_en_phc_adjtime, .gettime64 = mlx4_en_phc_gettime, .settime64 = mlx4_en_phc_settime,