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Miller" , UNGLinuxDriver@microchip.com, Alexandre Belloni , Claudiu Manoil , Vladimir Oltean , kernel test robot Subject: [PATCH v2 net-next 1/2] net: mscc: ocelot: utilize readx_poll_timeout() for chip reset Date: Sat, 17 Sep 2022 10:51:26 -0700 Message-Id: <20220917175127.161504-2-colin.foster@in-advantage.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220917175127.161504-1-colin.foster@in-advantage.com> References: <20220917175127.161504-1-colin.foster@in-advantage.com> X-ClientProxiedBy: SJ0PR05CA0148.namprd05.prod.outlook.com (2603:10b6:a03:33d::33) To MWHPR1001MB2351.namprd10.prod.outlook.com (2603:10b6:301:35::37) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWHPR1001MB2351:EE_|SA2PR10MB4523:EE_ X-MS-Office365-Filtering-Correlation-Id: c2f1e926-de3f-41f8-ff60-08da98d5472d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: sv354KRKX+IRL9Q0K0xCFx6RgEN3hcmLugR4JTCXk1r8wpfaaWu8NRnGNHprUJaCH00YLCVPnVdJaznHYmbyBFXL4gVIbBY8OePSXiXazF5AGMXX5vlDA+vq35IDbL2Q7ktD5HBQj/xOxs7ljv5xOkTIcwqPdg+TR49TmR6kgTpsa0jfmWkun3Ucc5CChDq5pZtfJxSotblUyCL5AYm1gb2TTXUi57+Atf0stcor/W+aZ/FpxXeB5okFLgLVtEdOGCGITxiUKLJpWIWofcXPAPaOjlBJ0zyiA5LPGWRT2odhi0vAXJazir0Pmzgs2c+GmZLcm9jAcsMIwTnPSoEUxi3o1d6N3uQH4cvvq7yM+0uegSIpOKaEfSgn532Yts5l/N3WLSxM4xR3MtYLyNXkAfkNONiMCha+05WOTE4WK/b9JYSKDodZdCIThEESn4EbUF9DnfACogXBkkLhR46OVgeztdGKT89hBHzjl3oze5sHtL6kmEb2UZ2yxbNYfvzKcCwlFPsncV75tSL1nU7Cyt2M0n6U7YpEY1zcWbnOtNhpyW4bzV8nM9Sp6NmoprFZu7cSA7Rxk7Vj4z+IHU6HdLDltpN1feI7DOClwLrHGnIq2FP+eLAa0MJy+icn7SZTVzvzSf0qpItGDcxGU4eAsjMk3ysCZtHwC+YP+75I07cD9CFkMOfWf5Vjn+intPewaVXKdr6UadO4xJ8XnNxWRor9oq6ruLi/kwqTKZbhM4O4BQ7srZm1q4QHYVOzAKz6yIYZJcosPifd19AnO8qHvg== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:MWHPR1001MB2351.namprd10.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230022)(136003)(39830400003)(366004)(376002)(346002)(396003)(451199015)(36756003)(5660300002)(8936002)(2616005)(7416002)(38350700002)(66556008)(66946007)(38100700002)(8676002)(66476007)(86362001)(44832011)(2906002)(4326008)(54906003)(478600001)(6486002)(83380400001)(1076003)(186003)(52116002)(316002)(6506007)(41300700001)(6666004)(26005)(6512007);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: rpaWPo5oD6BO2tlNv069AFE76VfGq2dww4+cU3PJ6R3WY/9vQYTveDxi+kMQL5GS/xNr1fv2qwZ3x9ZbH1zR6QtISTf0ukIR5RAxWm6XT6yN99nQPGFQ2h+WR3u2UUBvOddgk9AJ3MhkWT9VnT/1NqqBdh1Cd1WZ40hW69gp7RxVHS3ao2ZFAz5tO2QP/cXYAOUZawziLSkDRMlGFVplsnrdLy+x4bpx3NKaRfXI6B4oZwk/5DzVQ7Zz60JJ2fR9AY6IiiFcqCxihiZhAFCdQXrjBcp0LMGkQ1R/YJCccTvZGcZjVniQnEhTgxGbN8Xc1WDLj2UaRRj6Zbq7CcUFhJG9jlpZW2jHHCSlNI7nzqWIW4pnLLJuCkmq/8KRSZ8Tw6r4/BNACXl8iLOVK5k+i9n/2xq6zrIBSO7xCmW4cJt4FlXmeoEXEPCjFpexFmnvcEXjBY2mXIrpNvY2ojmEUIlSEuXHpwnvn9OCOGZKS/DNdhrs/6kLZ3Pd5JWcnAhT5O8rfCigqW6JA7fhaESDrgAP+g4yjUzXQ6KbJT9U90ky8HrzwlKStx+9QQYTaahRrQ9BkAaZ6VjUo7MOeQ6WBw77r8tht+16l6nxPpmYcld5jRaqZto1G9h1KAZmcImp0qspOXndC5u+DeHeGCqYV75Z/hrVXI+IPVzMih+jFbAxuRHa7NvdIV/Y1n/bHl/anXHm5xZ4XrpYaPBWT31SfJeboqe5fuPQ9QhKfPTU5yCwUmXkfM8JwnkdZ1+9SQnD01OWgOtrvncu32GldJzaAXv4afrUFfTRg4J96zcCrsDkbg+gxOCH26dgiG4xzCv06PUBDOcuA1NqdsjjWiCtBmdOwPT5SjFSeTzxrzMd0MHmucdcbw5k+7nmMy+8+tczwDUfdw7YfiIgo0Mg7bchpAq/1xXf7tiKww1jikqgZ1aEkJMq4hhSA9HozGCCPEX32yMj/iILU9Q4gNjNCo7T7TkfcSIcyoYqPI1C36vpVdqDh3GkHB/VyrlCb18JSC/uovvpaz+5/La+6Co0nviyzMOgit6noRacAFylnHDQTmvAeliWMOV/e1KXxIW0rtDMmh0FdqSGofPnkTyjFKo9hKdr73Id6XQTBu3ZD0zuh16tAkANMYlbL5l05K2AOfAsRtHFzWOgb2Lg5dlBAs7ZccjWsUZwGXJQZjqPCPcBfkIFe9iiyIC9ElrlIOi/HZphwl6qqSF8MscbRUPSgcCXQIogvmhauwyEoT+bNPzYx5UIsxHWJweeKVdGucVPnnb1PdlvEiBjInUvv23wSV1ra4k0lJ0OWE6yOTugSPDCtlSuPranwdB15YIgubJQQTKiSw8yHS1bS9xY3DHo9hsiVrHkZf2obPQC/YxO3i5vd4ykq08tPDL0mZpheOg3OmtosU0JtVR+5xcl7gQKaXj4exj+YSX5ZucJ6E7BIzzJzfuteryC9TqCMU1YrIlsblVpoIxKwsrr907LMo/PXNad2yljseOESnTZWbUS7PNNPz6bn5qHMUhjuGgXQ2gJ+RuOwtkiP2dOTr0fyWU01NhhXtOStazIHXnNzE/tnpdoHAmK9ZEeEyR3tHLDYgaAwBBjGxoB1A6tonBE/OAuocI1lch7JqGNrtEaMvgx1y36yA8= X-OriginatorOrg: in-advantage.com X-MS-Exchange-CrossTenant-Network-Message-Id: c2f1e926-de3f-41f8-ff60-08da98d5472d X-MS-Exchange-CrossTenant-AuthSource: MWHPR1001MB2351.namprd10.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Sep 2022 17:51:41.9436 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 48e842ca-fbd8-4633-a79d-0c955a7d3aae X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 81pEUVeOw8NY8+TNoTlHGSZ6m9rovPD8c/cjHtLeXg+sQKT/KYfvlM1CLnkbPLQjROklT6OQACu6zeVXJ9CxmEmzmvRUDN5kKLJ8+hqMBVI= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA2PR10MB4523 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Clean up the reset code by utilizing readx_poll_timeout instead of a custom loop. Signed-off-by: Colin Foster Reviewed-by: Vladimir Oltean Reported-by: kernel test robot --- v2: Remove IS_ERR_VALUE macro compile error for 64-bit Add Reviewed and Reported tags --- drivers/net/ethernet/mscc/ocelot_vsc7514.c | 32 ++++++++++++++++------ 1 file changed, 23 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/mscc/ocelot_vsc7514.c b/drivers/net/ethernet/mscc/ocelot_vsc7514.c index ae42bbba5747..3fb9183c1159 100644 --- a/drivers/net/ethernet/mscc/ocelot_vsc7514.c +++ b/drivers/net/ethernet/mscc/ocelot_vsc7514.c @@ -6,6 +6,7 @@ */ #include #include +#include #include #include #include @@ -25,6 +26,9 @@ #define VSC7514_VCAP_POLICER_BASE 128 #define VSC7514_VCAP_POLICER_MAX 191 +#define MEM_INIT_SLEEP_US 1000 +#define MEM_INIT_TIMEOUT_US 100000 + static const u32 *ocelot_regmap[TARGET_MAX] = { [ANA] = vsc7514_ana_regmap, [QS] = vsc7514_qs_regmap, @@ -191,22 +195,32 @@ static const struct of_device_id mscc_ocelot_match[] = { }; MODULE_DEVICE_TABLE(of, mscc_ocelot_match); +static int ocelot_mem_init_status(struct ocelot *ocelot) +{ + unsigned int val; + int err; + + err = regmap_field_read(ocelot->regfields[SYS_RESET_CFG_MEM_INIT], + &val); + + return err ?: val; +} + static int ocelot_reset(struct ocelot *ocelot) { - int retries = 100; + int err; u32 val; regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_INIT], 1); regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_ENA], 1); - do { - msleep(1); - regmap_field_read(ocelot->regfields[SYS_RESET_CFG_MEM_INIT], - &val); - } while (val && --retries); - - if (!retries) - return -ETIMEDOUT; + /* MEM_INIT is a self-clearing bit. Wait for it to be cleared (should be + * 100us) before enabling the switch core. + */ + err = readx_poll_timeout(ocelot_mem_init_status, ocelot, val, !val, + MEM_INIT_SLEEP_US, MEM_INIT_TIMEOUT_US); + if (err) + return err; regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_ENA], 1); regmap_field_write(ocelot->regfields[SYS_RESET_CFG_CORE_ENA], 1);