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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin CC: Florian Fainelli , Vladimir Oltean , Giuseppe Cavallaro , "Alexandre Torgue" , Jose Abreu , , , Revanth Kumar Uppala , Jon Hunter Subject: [PATCH V6 1/2] net: stmmac: Power up SERDES after the PHY link Date: Thu, 1 Dec 2022 15:58:43 +0000 Message-ID: <20221201155844.43217-1-jonathanh@nvidia.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-NVConfidentiality: public X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C97D:EE_|IA1PR12MB6387:EE_ X-MS-Office365-Filtering-Correlation-Id: 31d539a7-7334-4aa6-94f6-08dad3b4f114 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: HGnFibkwoaq+JCAW0v2lDEuBUwo0AXwBNhgHHuBDEwuMxn7H+HT58NneIha8whIbHYjH5E+FO+7+oSTpWyG0b6wL5rVAhDwjKUN8RGujxCzMhWUfajLRzAYABbB4R0/fsiG+QPDB6zFV7xXkmo4fqc6JfSfnQ+cjI6bohvjIxk2sgepeZTb2wPMJT8a5xEqnj7idGAcpDlGlpaurGi1OeuS6u/vdEpKV+eNabIHFCxEwkyPbvRALt222XaJJD07nj/GmM3nZKti68TXmoJO7OkJKd6H+8y4H/0hJSf+4Djn3NDiejioPDETUIgMXCZkJ6P3h0O1d6vopETcMJrW4H6rxBTek3pyj4t4dEKXVZ+BCvCIdam9wI0NeKQRhcwLWirNPcIU5ZEdm/xkHJYqloWvhva2gtzS3A9gDX1g7oaPVyxkjEJ1GDFCqYuuPBrcwGd1gl4m3jLFkqrp38/E+SBZ77L48ncWdcybNAmwniZCLopZNPYrS5kkyRFVshZUIi0K0YtSXmuAK8yh46wg0uS27LatuSfcHKM0R7Af36AxslYeAIFmBMT9V5uKYIZPR3jhnSB+5eLMqMPaMVijqZpb38RYvXK4YMwsjqnABghxswtgjSAe4ttyi8Xl996GDa+s9TV6AaVGi594eHvhuKDbslq8kpX96H50ghNQSvoa0sQuvSnh6xZxgNQJE4orw4f1siG91J+b5RwWU0sVg5A== X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230022)(4636009)(376002)(346002)(39860400002)(136003)(396003)(451199015)(46966006)(36840700001)(40470700004)(7636003)(356005)(54906003)(110136005)(86362001)(107886003)(40460700003)(82310400005)(36756003)(82740400003)(40480700001)(316002)(478600001)(5660300002)(70586007)(7416002)(8936002)(2906002)(70206006)(41300700001)(4326008)(8676002)(36860700001)(83380400001)(6666004)(26005)(7696005)(47076005)(426003)(1076003)(186003)(2616005)(336012);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Dec 2022 15:58:51.7640 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 31d539a7-7334-4aa6-94f6-08dad3b4f114 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C97D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6387 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From: Revanth Kumar Uppala The Tegra MGBE ethernet controller requires that the SERDES link is powered-up after the PHY link is up, otherwise the link fails to become ready following a resume from suspend. Add a variable to indicate that the SERDES link must be powered-up after the PHY link. Signed-off-by: Revanth Kumar Uppala Signed-off-by: Jon Hunter --- Changes since V5: - None Changes since V4: - This patch was added in the 5th iteration of the series. drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 7 +++++-- include/linux/stmmac.h | 1 + 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 0a9d13d7976f..3affb7d3a005 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -988,6 +988,9 @@ static void stmmac_mac_link_up(struct phylink_config *config, struct stmmac_priv *priv = netdev_priv(to_net_dev(config->dev)); u32 old_ctrl, ctrl; + if (priv->plat->serdes_up_after_phy_linkup && priv->plat->serdes_powerup) + priv->plat->serdes_powerup(priv->dev, priv->plat->bsp_priv); + old_ctrl = readl(priv->ioaddr + MAC_CTRL_REG); ctrl = old_ctrl & ~priv->hw->link.speed_mask; @@ -3801,7 +3804,7 @@ static int __stmmac_open(struct net_device *dev, stmmac_reset_queues_param(priv); - if (priv->plat->serdes_powerup) { + if (!priv->plat->serdes_up_after_phy_linkup && priv->plat->serdes_powerup) { ret = priv->plat->serdes_powerup(dev, priv->plat->bsp_priv); if (ret < 0) { netdev_err(priv->dev, "%s: Serdes powerup failed\n", @@ -7510,7 +7513,7 @@ int stmmac_resume(struct device *dev) stmmac_mdio_reset(priv->mii); } - if (priv->plat->serdes_powerup) { + if (!priv->plat->serdes_up_after_phy_linkup && priv->plat->serdes_powerup) { ret = priv->plat->serdes_powerup(ndev, priv->plat->bsp_priv); diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index fb2e88614f5d..83ca2e8eb6b5 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -271,5 +271,6 @@ struct plat_stmmacenet_data { int msi_tx_base_vec; bool use_phy_wol; bool sph_disable; + bool serdes_up_after_phy_linkup; }; #endif