@@ -13,6 +13,7 @@
#define I40E_TXD_CMD (I40E_TX_DESC_CMD_EOP | I40E_TX_DESC_CMD_RS)
#define I40E_IDX_NEXT(n, max) { if (++(n) > (max)) n = 0; }
+#define I40E_INC_NEXT(p, c, max) do { I40E_IDX_NEXT(p, max); c = p; } while (0)
/**
* i40e_fdir - Generate a Flow Director descriptor based on fdata
* @tx_ring: Tx ring to send buffer on
@@ -1526,6 +1527,7 @@ void i40e_clean_rx_ring(struct i40e_ring *rx_ring)
rx_ring->next_to_alloc = 0;
rx_ring->next_to_clean = 0;
rx_ring->next_to_use = 0;
+ rx_ring->next_to_process = 0;
}
/**
@@ -1576,6 +1578,7 @@ int i40e_setup_rx_descriptors(struct i40e_ring *rx_ring)
}
rx_ring->next_to_alloc = 0;
+ rx_ring->next_to_process = 0;
rx_ring->next_to_clean = 0;
rx_ring->next_to_use = 0;
@@ -2425,6 +2428,7 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget,
u16 cleaned_count = I40E_DESC_UNUSED(rx_ring);
unsigned int offset = rx_ring->rx_offset;
struct sk_buff *skb = rx_ring->skb;
+ u16 ntp = rx_ring->next_to_process;
u16 ntc = rx_ring->next_to_clean;
u16 rmax = rx_ring->count - 1;
unsigned int xdp_xmit = 0;
@@ -2453,7 +2457,7 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget,
cleaned_count = 0;
}
- rx_desc = I40E_RX_DESC(rx_ring, ntc);
+ rx_desc = I40E_RX_DESC(rx_ring, ntp);
/* status_error_len will always be zero for unused descriptors
* because it's cleared in cleanup, and overlaps with hdr_addr
@@ -2472,8 +2476,8 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget,
i40e_clean_programming_status(rx_ring,
rx_desc->raw.qword[0],
qword);
- rx_buffer = i40e_rx_bi(rx_ring, ntc);
- I40E_IDX_NEXT(ntc, rmax);
+ rx_buffer = i40e_rx_bi(rx_ring, ntp);
+ I40E_INC_NEXT(ntp, ntc, rmax);
i40e_reuse_rx_page(rx_ring, rx_buffer);
cleaned_count++;
continue;
@@ -2485,7 +2489,7 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget,
break;
i40e_trace(clean_rx_irq, rx_ring, rx_desc, skb);
- rx_buffer = i40e_get_rx_buffer(rx_ring, size, ntc);
+ rx_buffer = i40e_get_rx_buffer(rx_ring, size, ntp);
/* retrieve a buffer from the ring */
if (!skb) {
@@ -2529,7 +2533,7 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget,
i40e_put_rx_buffer(rx_ring, rx_buffer);
cleaned_count++;
- I40E_IDX_NEXT(ntc, rmax);
+ I40E_INC_NEXT(ntp, ntc, rmax);
if (i40e_is_non_eop(rx_ring, rx_desc))
continue;
@@ -2551,6 +2555,7 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget,
/* update budget accounting */
total_rx_packets++;
}
+ rx_ring->next_to_process = ntp;
rx_ring->next_to_clean = ntc;
i40e_finalize_xdp_rx(rx_ring, xdp_xmit);
@@ -337,6 +337,10 @@ struct i40e_ring {
u8 dcb_tc; /* Traffic class of ring */
u8 __iomem *tail;
+ u16 next_to_process; /* Next descriptor to be processed; for MB packet
+ * next_to_clean will be updated only after all
+ * buffers have been processed.
+ */
/* high bit set means dynamic, use accessor routines to read/write.
* hardware only supports 2us resolution for the ITR registers.
* these values always store the USER setting, and must be converted
Add a new field called next_to_process in the i40e_ring that is advanced for every buffer and change the semantics of next_to_clean to point to the first buffer of a packet. Driver will use next_to_process in the same way next_to_clean was used previously. For the non multi-buffer case, next_to_process and next_to_clean will always be the same since each packet consists of a single buffer. Signed-off-by: Tirthendu Sarkar <tirthendu.sarkar@intel.com> --- drivers/net/ethernet/intel/i40e/i40e_txrx.c | 15 ++++++++++----- drivers/net/ethernet/intel/i40e/i40e_txrx.h | 4 ++++ 2 files changed, 14 insertions(+), 5 deletions(-)