diff mbox series

[net-next] net: macb: Reset TX when TX halt times out

Message ID 20230316083554.2432-1-harini.katakam@amd.com (mailing list archive)
State Superseded
Delegated to: Netdev Maintainers
Headers show
Series [net-next] net: macb: Reset TX when TX halt times out | expand

Checks

Context Check Description
netdev/series_format success Single patches do not need cover letters
netdev/tree_selection success Clearly marked for net-next
netdev/fixes_present success Fixes tag not required for -next series
netdev/header_inline success No static functions without inline keyword in header files
netdev/build_32bit success Errors and warnings before: 39 this patch: 39
netdev/cc_maintainers success CCed 7 of 7 maintainers
netdev/build_clang success Errors and warnings before: 18 this patch: 18
netdev/verify_signedoff success Signed-off-by tag matches author and committer
netdev/deprecated_api success None detected
netdev/check_selftest success No net selftest shell script
netdev/verify_fixes success No Fixes tag
netdev/build_allmodconfig_warn success Errors and warnings before: 39 this patch: 39
netdev/checkpatch success total: 0 errors, 0 warnings, 0 checks, 29 lines checked
netdev/kdoc success Errors and warnings before: 0 this patch: 0
netdev/source_inline success Was 0 now: 0

Commit Message

Katakam, Harini March 16, 2023, 8:35 a.m. UTC
From: Harini Katakam <harini.katakam@xilinx.com>

Reset TX when halt times out i.e. disable TX, clean up TX BDs,
interrupts (already done) and enable TX.
This addresses the issue observed when iperf is run at 10Mps Half
duplex where, after multiple collisions and retries, TX halts.

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
---
 drivers/net/ethernet/cadence/macb_main.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

Comments

Michal Swiatkowski March 16, 2023, 10:54 a.m. UTC | #1
On Thu, Mar 16, 2023 at 02:05:54PM +0530, Harini Katakam wrote:
> From: Harini Katakam <harini.katakam@xilinx.com>
> 
> Reset TX when halt times out i.e. disable TX, clean up TX BDs,
> interrupts (already done) and enable TX.
> This addresses the issue observed when iperf is run at 10Mps Half
> duplex where, after multiple collisions and retries, TX halts.
> 
> Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> ---
>  drivers/net/ethernet/cadence/macb_main.c | 10 ++++++++--
>  1 file changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
> index 96fd2aa9ee90..473c2d0174ad 100644
> --- a/drivers/net/ethernet/cadence/macb_main.c
> +++ b/drivers/net/ethernet/cadence/macb_main.c
> @@ -1021,6 +1021,7 @@ static void macb_tx_error_task(struct work_struct *work)
>  	struct sk_buff		*skb;
>  	unsigned int		tail;
>  	unsigned long		flags;
> +	bool			halt_timeout = false;
RCT

Otherwise looks fine
Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>

[...]

> -- 
> 2.17.1
>
Nicolas Ferre March 16, 2023, 4:20 p.m. UTC | #2
On 16/03/2023 at 11:54, Michal Swiatkowski wrote:
> On Thu, Mar 16, 2023 at 02:05:54PM +0530, Harini Katakam wrote:
>> From: Harini Katakam <harini.katakam@xilinx.com>
>>
>> Reset TX when halt times out i.e. disable TX, clean up TX BDs,
>> interrupts (already done) and enable TX.
>> This addresses the issue observed when iperf is run at 10Mps Half
>> duplex where, after multiple collisions and retries, TX halts.
>>
>> Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
>> ---
>>   drivers/net/ethernet/cadence/macb_main.c | 10 ++++++++--
>>   1 file changed, 8 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
>> index 96fd2aa9ee90..473c2d0174ad 100644
>> --- a/drivers/net/ethernet/cadence/macb_main.c
>> +++ b/drivers/net/ethernet/cadence/macb_main.c
>> @@ -1021,6 +1021,7 @@ static void macb_tx_error_task(struct work_struct *work)
>>        struct sk_buff          *skb;
>>        unsigned int            tail;
>>        unsigned long           flags;
>> +     bool                    halt_timeout = false;
> RCT

Yes, might not pass the netdev checks.

> Otherwise looks fine
> Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>

Likewise, this fixed:
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>

Best regards,
   Nicolas

> 
> [...]
> 
>> --
>> 2.17.1
>>
diff mbox series

Patch

diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index 96fd2aa9ee90..473c2d0174ad 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -1021,6 +1021,7 @@  static void macb_tx_error_task(struct work_struct *work)
 	struct sk_buff		*skb;
 	unsigned int		tail;
 	unsigned long		flags;
+	bool			halt_timeout = false;
 
 	netdev_vdbg(bp->dev, "macb_tx_error_task: q = %u, t = %u, h = %u\n",
 		    (unsigned int)(queue - bp->queues),
@@ -1042,9 +1043,11 @@  static void macb_tx_error_task(struct work_struct *work)
 	 * (in case we have just queued new packets)
 	 * macb/gem must be halted to write TBQP register
 	 */
-	if (macb_halt_tx(bp))
-		/* Just complain for now, reinitializing TX path can be good */
+	if (macb_halt_tx(bp)) {
 		netdev_err(bp->dev, "BUG: halt tx timed out\n");
+		macb_writel(bp, NCR, macb_readl(bp, NCR) & (~MACB_BIT(TE)));
+		halt_timeout = true;
+	}
 
 	/* Treat frames in TX queue including the ones that caused the error.
 	 * Free transmit buffers in upper layer.
@@ -1115,6 +1118,9 @@  static void macb_tx_error_task(struct work_struct *work)
 	macb_writel(bp, TSR, macb_readl(bp, TSR));
 	queue_writel(queue, IER, MACB_TX_INT_FLAGS);
 
+	if (halt_timeout)
+		macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TE));
+
 	/* Now we are ready to start transmission again */
 	netif_tx_start_all_queues(bp->dev);
 	macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART));