From patchwork Sun May 14 20:10:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Horatiu Vultur X-Patchwork-Id: 13240566 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A7138C129 for ; Sun, 14 May 2023 20:11:37 +0000 (UTC) Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A2EFC10CF; Sun, 14 May 2023 13:11:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1684095094; x=1715631094; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZCoTpzt5BqJAXq5zySxmo0aFhsrh5Kb58pr5ecTk/MU=; b=o9atK5p0bbJaHjNe1VwzjVghoep/m9xZ+yXmpO8htlKqLLMhYZ4TWfF9 Q5g+LZatzax+uslsB2D1CQY9jrmw3AO/c+6VzCaDuxL/cnMwtDBVHSvv2 w7+yqdhSXrhqjt15GyopOAU9bwPkq2E1xqIM4yIc7O4FnWAE+2hbJIiyC yoqkjlKAKi3jOIEP4FIpSeOFv81W/PPSnj3p+xIqm+szNbDn1op6ARQt5 Zuhb5U1yQ7HXfES1r54e5TYsItLuhAoBYzqbMVNg0qzb4jg1J+0RJSYIh +eLqseRc5elODnOE4theY0Aoo/i2LAErI+IGEuvfoj/012wsoG1HSF9JF A==; X-IronPort-AV: E=Sophos;i="5.99,274,1677567600"; d="scan'208";a="211196334" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 14 May 2023 13:11:33 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Sun, 14 May 2023 13:11:32 -0700 Received: from soft-dev3-1.microsemi.net (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Sun, 14 May 2023 13:11:31 -0700 From: Horatiu Vultur To: , CC: , , , , , Horatiu Vultur Subject: [PATCH net-next 7/7] net: lan966x: Add support for DSCP rewrite Date: Sun, 14 May 2023 22:10:29 +0200 Message-ID: <20230514201029.1867738-8-horatiu.vultur@microchip.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230514201029.1867738-1-horatiu.vultur@microchip.com> References: <20230514201029.1867738-1-horatiu.vultur@microchip.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org Add support for DSCP rewrite in lan966x driver. On egress DSCP is rewritten from either classified DSCP, or frame DSCP. Classified DSCP is determined by the Analyzer Classifier on ingress, and is mapped from classified QoS class and DP level. Classification of DSCP is by default enabled for all ports. It is required that DSCP is trusted for the egress port *and* rewrite table is not empty, in order to rewrite DSCP based on classified DSCP, otherwise DSCP is always rewritten from frame DSCP. Signed-off-by: Horatiu Vultur --- .../ethernet/microchip/lan966x/lan966x_dcb.c | 36 +++++++++++++++++-- .../ethernet/microchip/lan966x/lan966x_main.h | 13 +++++++ .../ethernet/microchip/lan966x/lan966x_port.c | 35 ++++++++++++++++++ 3 files changed, 81 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_dcb.c b/drivers/net/ethernet/microchip/lan966x/lan966x_dcb.c index 56a2fad406333..1d74a8faa010c 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_dcb.c +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_dcb.c @@ -46,10 +46,12 @@ static bool lan966x_dcb_apptrust_contains(int portno, u8 selector) static void lan966x_dcb_app_update(struct net_device *dev) { + struct dcb_ieee_app_prio_map dscp_rewr_map = {0}; struct dcb_rewr_prio_pcp_map pcp_rewr_map = {0}; struct lan966x_port *port = netdev_priv(dev); struct lan966x_port_qos qos = {0}; struct dcb_app app_itr; + bool dscp_rewr = false; bool pcp_rewr = false; /* Get pcp ingress mapping */ @@ -81,6 +83,16 @@ static void lan966x_dcb_app_update(struct net_device *dev) qos.pcp_rewr.map[i] = fls(pcp_rewr_map.map[i]) - 1; } + /* Get dscp rewrite mapping */ + dcb_getrewr_prio_dscp_mask_map(dev, &dscp_rewr_map); + for (int i = 0; i < ARRAY_SIZE(dscp_rewr_map.map); i++) { + if (!dscp_rewr_map.map[i]) + continue; + + dscp_rewr = true; + qos.dscp_rewr.map[i] = fls64(dscp_rewr_map.map[i]) - 1; + } + /* Enable use of pcp for queue classification */ if (lan966x_dcb_apptrust_contains(port->chip_port, DCB_APP_SEL_PCP)) { qos.pcp.enable = true; @@ -90,9 +102,13 @@ static void lan966x_dcb_app_update(struct net_device *dev) } /* Enable use of dscp for queue classification */ - if (lan966x_dcb_apptrust_contains(port->chip_port, IEEE_8021QAZ_APP_SEL_DSCP)) + if (lan966x_dcb_apptrust_contains(port->chip_port, IEEE_8021QAZ_APP_SEL_DSCP)) { qos.dscp.enable = true; + if (dscp_rewr) + qos.dscp_rewr.enable = true; + } + lan966x_port_qos_set(port, &qos); } @@ -273,7 +289,11 @@ static int lan966x_dcb_delrewr(struct net_device *dev, struct dcb_app *app) { int err; - err = dcb_delrewr(dev, app); + if (app->selector == IEEE_8021QAZ_APP_SEL_DSCP) + err = lan966x_dcb_ieee_dscp_setdel(dev, app, dcb_delrewr); + else + err = dcb_delrewr(dev, app); + if (err < 0) return err; @@ -300,7 +320,11 @@ static int lan966x_dcb_setrewr(struct net_device *dev, struct dcb_app *app) lan966x_dcb_delrewr(dev, &app_itr); } - err = dcb_setrewr(dev, app); + if (app->selector == IEEE_8021QAZ_APP_SEL_DSCP) + err = lan966x_dcb_ieee_dscp_setdel(dev, app, dcb_setrewr); + else + err = dcb_setrewr(dev, app); + if (err) goto out; @@ -332,5 +356,11 @@ void lan966x_dcb_init(struct lan966x *lan966x) lan966x_port_apptrust[port->chip_port] = &lan966x_dcb_apptrust_policies[LAN966X_DCB_APPTRUST_DSCP_PCP]; + + /* Enable DSCP classification based on classified QoS class and + * DP, for all DSCP values, for all ports. + */ + lan966x_port_qos_dscp_rewr_mode_set(port, + LAN966X_PORT_QOS_REWR_DSCP_ALL); } } diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_main.h b/drivers/net/ethernet/microchip/lan966x/lan966x_main.h index 16b0149ac2b5d..27f272831ea5c 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_main.h +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_main.h @@ -115,6 +115,11 @@ #define LAN966X_PORT_REW_TAG_CTRL_CLASSIFIED 0 #define LAN966X_PORT_REW_TAG_CTRL_MAPPED 2 +/* Port DSCP rewrite mode */ +#define LAN966X_PORT_REW_DSCP_FRAME 0 +#define LAN966X_PORT_REW_DSCP_ANALIZER 1 +#define LAN966X_PORT_QOS_REWR_DSCP_ALL 3 + /* MAC table entry types. * ENTRYTYPE_NORMAL is subject to aging. * ENTRYTYPE_LOCKED is not subject to aging. @@ -418,10 +423,16 @@ struct lan966x_port_qos_pcp_rewr { bool enable; }; +struct lan966x_port_qos_dscp_rewr { + u16 map[LAN966X_PORT_QOS_DSCP_COUNT]; + bool enable; +}; + struct lan966x_port_qos { struct lan966x_port_qos_pcp pcp; struct lan966x_port_qos_dscp dscp; struct lan966x_port_qos_pcp_rewr pcp_rewr; + struct lan966x_port_qos_dscp_rewr dscp_rewr; u8 default_prio; }; @@ -491,6 +502,8 @@ void lan966x_port_init(struct lan966x_port *port); void lan966x_port_qos_set(struct lan966x_port *port, struct lan966x_port_qos *qos); +void lan966x_port_qos_dscp_rewr_mode_set(struct lan966x_port *port, + int mode); int lan966x_mac_ip_learn(struct lan966x *lan966x, bool cpu_copy, diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_port.c b/drivers/net/ethernet/microchip/lan966x/lan966x_port.c index 6887746d081f6..92108d354051c 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_port.c +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_port.c @@ -499,6 +499,40 @@ static void lan966x_port_qos_pcp_rewr_set(struct lan966x_port *port, } } +static void lan966x_port_qos_dscp_rewr_set(struct lan966x_port *port, + struct lan966x_port_qos_dscp_rewr *qos) +{ + u16 dscp; + u8 mode; + + if (qos->enable) + mode = LAN966X_PORT_REW_DSCP_ANALIZER; + else + mode = LAN966X_PORT_REW_DSCP_FRAME; + + /* Enable the rewrite otherwise will use the values from the frame */ + lan_rmw(REW_DSCP_CFG_DSCP_REWR_CFG_SET(mode), + REW_DSCP_CFG_DSCP_REWR_CFG, + port->lan966x, REW_DSCP_CFG(port->chip_port)); + + /* Map each classified Qos class and DP to classified DSCP value */ + for (int i = 0; i < ARRAY_SIZE(qos->map); i++) { + dscp = qos->map[i]; + + lan_rmw(ANA_DSCP_REWR_CFG_DSCP_QOS_REWR_VAL_SET(dscp), + ANA_DSCP_REWR_CFG_DSCP_QOS_REWR_VAL, + port->lan966x, ANA_DSCP_REWR_CFG(i)); + } +} + +void lan966x_port_qos_dscp_rewr_mode_set(struct lan966x_port *port, + int mode) +{ + lan_rmw(ANA_QOS_CFG_DSCP_REWR_CFG_SET(mode), + ANA_QOS_CFG_DSCP_REWR_CFG, + port->lan966x, ANA_QOS_CFG(port->chip_port)); +} + void lan966x_port_qos_set(struct lan966x_port *port, struct lan966x_port_qos *qos) { @@ -506,6 +540,7 @@ void lan966x_port_qos_set(struct lan966x_port *port, lan966x_port_qos_dscp_set(port, &qos->dscp); lan966x_port_qos_default_set(port, qos); lan966x_port_qos_pcp_rewr_set(port, &qos->pcp_rewr); + lan966x_port_qos_dscp_rewr_set(port, &qos->dscp_rewr); } void lan966x_port_init(struct lan966x_port *port)