From patchwork Fri Oct 27 23:22:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Chan X-Patchwork-Id: 13439310 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4C6B441A80 for ; Fri, 27 Oct 2023 23:23:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="M+bGUxGp" Received: from mail-qk1-x729.google.com (mail-qk1-x729.google.com [IPv6:2607:f8b0:4864:20::729]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 15B291BE for ; Fri, 27 Oct 2023 16:23:49 -0700 (PDT) Received: by mail-qk1-x729.google.com with SMTP id af79cd13be357-77774120c6eso189443085a.2 for ; Fri, 27 Oct 2023 16:23:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1698449028; x=1699053828; darn=vger.kernel.org; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:from:to:cc:subject:date:message-id:reply-to; bh=qlJY4NBbnfcljX0aa+LVE5jPbItAdF8QajJawMF2uKU=; b=M+bGUxGp9No+RNbKUnKNynrw6Hb+sYfLp3HtqZMPGVbriqr1ZWC6/w012S/9qbahWP ix3SprrcR2V2lwalrGxCnVDsevIDcgBli+hhG61G3RpwWWeNUjb9aySJDjq3idxJnbjr D4gf4AZnSfOiwZ2MOUHqYy80h00iTz3cE2KlQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698449028; x=1699053828; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=qlJY4NBbnfcljX0aa+LVE5jPbItAdF8QajJawMF2uKU=; b=SDkASOiJNRivpG61A6q5mfSOEY8TwjEWjft+xPS9UmeeeJLRZOCpHyw9dbQJy4t9gu caRqTrC26uTNdhGFYW6M+cbev4eCIXo4uRd40FquobpLLEfEbt+gJowKiQ9XfeGfC3VU HElaaalOIYWOs44tQcKjl+bnrstdmdYdEf4spcf7UjiwaRlxY3FVgqJiuGROQZkdHfmJ 77ak7iJHN0XDiPvLCuC19COALTpGhRu32fyro3rE5jY9mr+YrPC2/PMNXSWmvyayuLS2 b1MgTDwshnXVWEbZKtptEUKajP67zGd1Ha6m2FbB4fdc3oL6xtMHlc46/nTeh2WE8Zzm zQ2A== X-Gm-Message-State: AOJu0YxTTLd7CI01cnTjIGtqVmWs7Wu1NjYmZ4uZ1XVzCOLECUmUplBU VRPEvqb1oEMJ3YpcwPGkY59Jaw== X-Google-Smtp-Source: AGHT+IH4kUcqmde0jVJ/v1c/A8HYur4EsrURKAj6mU0vvi21Ezcw4MfU2QBtMmPylKfuXoPS1R/Rrg== X-Received: by 2002:a05:620a:2951:b0:779:f544:a470 with SMTP id n17-20020a05620a295100b00779f544a470mr4980746qkp.8.1698449028046; Fri, 27 Oct 2023 16:23:48 -0700 (PDT) Received: from lvnvda5233.lvn.broadcom.net ([192.19.161.250]) by smtp.gmail.com with ESMTPSA id y27-20020a05620a09db00b007742ad3047asm984169qky.54.2023.10.27.16.23.46 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 27 Oct 2023 16:23:47 -0700 (PDT) From: Michael Chan To: davem@davemloft.net Cc: netdev@vger.kernel.org, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, gospo@broadcom.com, Andy Gospodarek Subject: [PATCH net-next 11/13] bnxt_en: Add macros related to TC and TX rings Date: Fri, 27 Oct 2023 16:22:50 -0700 Message-Id: <20231027232252.36111-12-michael.chan@broadcom.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20231027232252.36111-1-michael.chan@broadcom.com> References: <20231027232252.36111-1-michael.chan@broadcom.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Add 3 macros that handle to conversions between TC numbers and TX ring numbers. These will help to clarify the existing logic and the new logic in the next patch. Reviewed-by: Andy Gospodarek Signed-off-by: Michael Chan --- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c index 7c1a3db651f5..d0eca7648927 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c @@ -3415,6 +3415,15 @@ static void bnxt_free_tx_rings(struct bnxt *bp) } } +#define BNXT_TC_TO_RING_BASE(bp, tc) \ + ((tc) * (bp)->tx_nr_rings_per_tc) + +#define BNXT_RING_TO_TC_OFF(bp, tx) \ + ((tx) % (bp)->tx_nr_rings_per_tc) + +#define BNXT_RING_TO_TC(bp, tx) \ + ((tx) / (bp)->tx_nr_rings_per_tc) + static int bnxt_alloc_tx_rings(struct bnxt *bp) { int i, j, rc; @@ -3470,7 +3479,7 @@ static int bnxt_alloc_tx_rings(struct bnxt *bp) spin_lock_init(&txr->xdp_tx_lock); if (i < bp->tx_nr_rings_xdp) continue; - if (i % bp->tx_nr_rings_per_tc == (bp->tx_nr_rings_per_tc - 1)) + if (BNXT_RING_TO_TC_OFF(bp, i) == (bp->tx_nr_rings_per_tc - 1)) j++; } return 0; @@ -9140,7 +9149,7 @@ static void bnxt_setup_msix(struct bnxt *bp) for (i = 0; i < tcs; i++) { count = bp->tx_nr_rings_per_tc; - off = i * count; + off = BNXT_TC_TO_RING_BASE(bp, i); netdev_set_tc_queue(dev, i, count, off); } }