From patchwork Wed Nov 15 19:36:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Saeed Mahameed X-Patchwork-Id: 13457267 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB1293C477 for ; Wed, 15 Nov 2023 19:37:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lE213ieu" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9FB28C433C8; Wed, 15 Nov 2023 19:37:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1700077020; bh=pZP3YkL9R6tKeuxvJ0/BPJtWTrnFvBH+94QIQTTXqC8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lE213ieuMlBEoak0xRKwhslZZOJDuLuVahGnv1iv+l0+gS0MGRgwpUsqUS/5fb/qB qiAtG8nLth1eQpojJF2pCBgu+EzOmczPj4yXBdRQBZR+Zv/RNn63z9b+5or9nneQt6 2LnXxQI9gZIOVvRsPaljea2bx8m2BIxPFm8ADQrtKjiC/LAaSyUcYe1S3lrdyIVqWa ogdUT9SQd1u/O3mgE85LJ8M4fsPzqHnNdU6pbMjRpJcQ2ujOfTfrxHmJ7jNIBQxBw/ Ae/rTbi9y83UpZqNUZV+nbrqjjiUSaIW+H71tb5xnHCgz2piYgR6sZXYRxOMJn7AvT bjr7HHk2pY9tA== From: Saeed Mahameed To: "David S. Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet Cc: Saeed Mahameed , netdev@vger.kernel.org, Tariq Toukan , Rahul Rameshbabu Subject: [net-next V2 10/13] net/mlx5: Convert scaled ppm values outside the s32 range for PHC frequency adjustments Date: Wed, 15 Nov 2023 11:36:46 -0800 Message-ID: <20231115193649.8756-11-saeed@kernel.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231115193649.8756-1-saeed@kernel.org> References: <20231115193649.8756-1-saeed@kernel.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: Rahul Rameshbabu Represent scaled ppm as ppb to the device when the value in scaled ppm is not representable as a 32-bit signed integer. mlx5 devices only support a 32-bit field for the frequency adjustment value in units of either scaled ppm or ppb. Since mlx5 devices only support a 32-bit field for the frequency adjustment value independent of unit used, limit the maximum frequency adjustment to S32_MAX ppb. Signed-off-by: Rahul Rameshbabu Reviewed-by: Tariq Toukan Signed-off-by: Saeed Mahameed --- drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c index ca7691930f6b..1daa4b019513 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c @@ -393,10 +393,12 @@ static int mlx5_ptp_freq_adj_real_time(struct mlx5_core_dev *mdev, long scaled_p MLX5_SET(mtutc_reg, in, operation, MLX5_MTUTC_OPERATION_ADJUST_FREQ_UTC); - if (MLX5_CAP_MCAM_FEATURE(mdev, mtutc_freq_adj_units)) { + if (MLX5_CAP_MCAM_FEATURE(mdev, mtutc_freq_adj_units) && + scaled_ppm <= S32_MAX && scaled_ppm >= S32_MIN) { + /* HW scaled_ppm support on mlx5 devices only supports a 32-bit value */ MLX5_SET(mtutc_reg, in, freq_adj_units, MLX5_MTUTC_FREQ_ADJ_UNITS_SCALED_PPM); - MLX5_SET(mtutc_reg, in, freq_adjustment, scaled_ppm); + MLX5_SET(mtutc_reg, in, freq_adjustment, (s32)scaled_ppm); } else { MLX5_SET(mtutc_reg, in, freq_adj_units, MLX5_MTUTC_FREQ_ADJ_UNITS_PPB); MLX5_SET(mtutc_reg, in, freq_adjustment, scaled_ppm_to_ppb(scaled_ppm));