From patchwork Thu Nov 16 11:24:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Luo X-Patchwork-Id: 13457809 X-Patchwork-Delegate: kuba@kernel.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="KSaVNX0w" Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C57410E0; Thu, 16 Nov 2023 03:25:31 -0800 (PST) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3AGAkG9v019803; Thu, 16 Nov 2023 11:25:19 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=xoUh7MWwDswQU0Qbcu6kSaukCEbi0jZ75coOg98MRMg=; b=KSaVNX0wi7Pf+0kZWH0Sn0oX8Al1iy8U6TyKMufYw1unRsCMYXL2F+T6U0r5g5533tcB Ox/zW7tipwyWgcDEioHBj4iJOXHcW+KDLYubO3h8ppuZC7tl/q3FnyY6mlWANYJpzN42 DJVOe7LXn/TFa1bH5b5lcMdbh7v/pF+WZ4ivv7WlIqRb6/JLu7HkH8pqa4zc2fyUUaNP 79pcQbJ/GmLBeJ8P1+1Th4TnSAC31aZcv003pyDzOXJrVVzkEqkxf2mhGwQMaiK2QPI2 xbnrC8hozRILPDTppHURNd3ReqEJr6iZnQm/GM9kVpbFalsRQc8jJxicWZ7CKzOEClU0 XA== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3ucubsb2xj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 Nov 2023 11:25:19 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3AGBPJQI016299 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 Nov 2023 11:25:19 GMT Received: from akronite-sh-dev02.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Thu, 16 Nov 2023 03:25:15 -0800 From: Luo Jie To: , , , , , , , , , , CC: , , , Subject: [PATCH v4 5/6] net: phy: at803x: Add qca8084_config_init function Date: Thu, 16 Nov 2023 19:24:36 +0800 Message-ID: <20231116112437.10578-6-quic_luoj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231116112437.10578-1-quic_luoj@quicinc.com> References: <20231116112437.10578-1-quic_luoj@quicinc.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: CaXrsVAkEQfFPH5zmd2tNpeyGY7TTFN4 X-Proofpoint-GUID: CaXrsVAkEQfFPH5zmd2tNpeyGY7TTFN4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-16_09,2023-11-16_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 malwarescore=0 mlxscore=0 clxscore=1015 bulkscore=0 suspectscore=0 lowpriorityscore=0 adultscore=0 phishscore=0 spamscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311160091 X-Patchwork-Delegate: kuba@kernel.org Configure MSE detect threshold and ADC clock edge invert. Signed-off-by: Luo Jie --- drivers/net/phy/at803x.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index f56202f5944d..06a068ca5539 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -280,6 +280,15 @@ #define QCA8081_PHY_SERDES_MMD1_FIFO_CTRL 0x9072 #define QCA8081_PHY_FIFO_RSTN BIT(11) +/* QCA8084 ADC clock edge */ +#define QCA8084_ADC_CLK_SEL 0x8b80 +#define QCA8084_ADC_CLK_SEL_ACLK GENMASK(7, 4) +#define QCA8084_ADC_CLK_SEL_ACLK_FALL 0xf +#define QCA8084_ADC_CLK_SEL_ACLK_RISE 0x0 + +#define QCA8084_MSE_THRESHOLD 0x800a +#define QCA8084_MSE_THRESHOLD_2P5G_VAL 0x51c6 + MODULE_DESCRIPTION("Qualcomm Atheros AR803x and QCA808X PHY driver"); MODULE_AUTHOR("Matus Ujhelyi"); MODULE_LICENSE("GPL"); @@ -2083,6 +2092,23 @@ static void qca808x_link_change_notify(struct phy_device *phydev) QCA8081_PHY_FIFO_RSTN, phydev->link ? QCA8081_PHY_FIFO_RSTN : 0); } +static int qca8084_config_init(struct phy_device *phydev) +{ + int ret; + + /* Invert ADC clock edge */ + ret = at803x_debug_reg_mask(phydev, QCA8084_ADC_CLK_SEL, + QCA8084_ADC_CLK_SEL_ACLK, + FIELD_PREP(QCA8084_ADC_CLK_SEL_ACLK, + QCA8084_ADC_CLK_SEL_ACLK_FALL)); + if (ret < 0) + return ret; + + /* Adjust MSE threshold value to avoid link issue with some link partner */ + return phy_write_mmd(phydev, MDIO_MMD_PMAPMD, + QCA8084_MSE_THRESHOLD, QCA8084_MSE_THRESHOLD_2P5G_VAL); +} + static struct phy_driver at803x_driver[] = { { /* Qualcomm Atheros AR8035 */ @@ -2280,6 +2306,7 @@ static struct phy_driver at803x_driver[] = { .soft_reset = qca808x_soft_reset, .cable_test_start = qca808x_cable_test_start, .cable_test_get_status = qca808x_cable_test_get_status, + .config_init = qca8084_config_init, }, }; module_phy_driver(at803x_driver);