From patchwork Mon Nov 20 23:43:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Chan X-Patchwork-Id: 13462283 X-Patchwork-Delegate: kuba@kernel.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="hG9oYKZN" Received: from mail-oo1-xc2b.google.com (mail-oo1-xc2b.google.com [IPv6:2607:f8b0:4864:20::c2b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 01E8BAA for ; Mon, 20 Nov 2023 15:44:46 -0800 (PST) Received: by mail-oo1-xc2b.google.com with SMTP id 006d021491bc7-5842a7fdc61so2580412eaf.3 for ; Mon, 20 Nov 2023 15:44:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1700523885; x=1701128685; darn=vger.kernel.org; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:from:to:cc:subject:date:message-id:reply-to; bh=jpwEa1tyAbByi1gRfGpj2gZgjDD2BUbcV1qdbEpVvQc=; b=hG9oYKZNZ6jFbb2kIuYeGduEU456mZFs68tUcDXLUx0nJ6camZ9exnCrFp5rXPtxNF cXmtPxl3sy2ZQJ+7ZZyuYYMr7VfdWQ85gfp+KCgFv0cPXNdrKX4faL4LP2BvCl46Rvcw pf/m8sIZBDXBL1MqEUtzFEpCH38auH1oagNYg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1700523885; x=1701128685; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=jpwEa1tyAbByi1gRfGpj2gZgjDD2BUbcV1qdbEpVvQc=; b=tsqFVYffLkMKiVJjCDO5ZT0IzhDz/ofrG2w8pJ/CsZlkcMMJ9Ouxfls6/4RGhfXpIt KrGP9FZHv/zMcIaFGhZyCtNBmmuxt5UFCtNreI7+QzTaRu22cs0n5k8ZdqSP8zSxbW1B 3KUXDoDX2hWZ7KImOoFt6cR8UV7/4RWkv0/FWO1c7KKgTo/xmTMiMJTDdLJv2T/14u8q ccxMhLtpSVo2GWQLmpvS3idsMWdWE1leGOOg9PJNt3CK3zlLseqz+0go9xyCM1SfVgVv 1gxi58WO/dIbyUF8be1Z/qtEf55P4D/66mIQ0PjF8vF8rMiPfBb6rwrRxNsCUzIO73DU uHmA== X-Gm-Message-State: AOJu0Yyy8etEpdTnH+wlkKdahx4BEKeQSHDnbZJmpCpliC+rluB9qG3g 3kimaGN4rt1VDimjL7aGUSsYJQ== X-Google-Smtp-Source: AGHT+IFhNbpqW4JDk17M/D1gDpXjp98CCBx4tJZzV6y6bzeqqSVEE215bZqJEV6zxgKkhE+T+DwA0A== X-Received: by 2002:a05:6358:9209:b0:169:9c45:ca12 with SMTP id d9-20020a056358920900b001699c45ca12mr10695254rwb.23.1700523884955; Mon, 20 Nov 2023 15:44:44 -0800 (PST) Received: from lvnvda5233.lvn.broadcom.net ([192.19.161.250]) by smtp.gmail.com with ESMTPSA id i9-20020ac871c9000000b0041803dfb240sm3053384qtp.45.2023.11.20.15.44.43 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 Nov 2023 15:44:44 -0800 (PST) From: Michael Chan To: davem@davemloft.net Cc: netdev@vger.kernel.org, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, gospo@broadcom.com, Andy Gospodarek Subject: [PATCH net-next 06/13] bnxt_en: Add bnxt_setup_ctxm_pg_tbls() helper function Date: Mon, 20 Nov 2023 15:43:58 -0800 Message-Id: <20231120234405.194542-7-michael.chan@broadcom.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20231120234405.194542-1-michael.chan@broadcom.com> References: <20231120234405.194542-1-michael.chan@broadcom.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org In bnxt_alloc_ctx_mem(), the logic to set up the context memory entries and to allocate the context memory tables is done repetitively. Add a helper function to simplify the code. The setup of the Fast Path TQM entries relies on some information from the Slow Path TQM entries. Copy the SP_TQM entries to the FP_TQM entries to simplify the logic. Reviewed-by: Andy Gospodarek Signed-off-by: Michael Chan --- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 133 ++++++++++------------ 1 file changed, 59 insertions(+), 74 deletions(-) diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c index 524023b8e959..e42c82ed0fd5 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c @@ -7307,6 +7307,7 @@ static int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp) ctx->tqm_fp_rings_count = BNXT_MAX_TQM_FP_RINGS; ctxm = &ctx->ctx_arr[BNXT_CTX_FTQM]; + memcpy(ctxm, &ctx->ctx_arr[BNXT_CTX_STQM], sizeof(*ctxm)); ctxm->instance_bmap = (1 << ctx->tqm_fp_rings_count) - 1; rc = bnxt_alloc_all_ctx_pg_info(bp, BNXT_CTX_MAX); @@ -7574,6 +7575,30 @@ static void bnxt_free_ctx_pg_tbls(struct bnxt *bp, ctx_pg->nr_pages = 0; } +static int bnxt_setup_ctxm_pg_tbls(struct bnxt *bp, + struct bnxt_ctx_mem_type *ctxm, u32 entries, + u8 pg_lvl) +{ + struct bnxt_ctx_pg_info *ctx_pg = ctxm->pg_info; + int i, rc = 0, n = 1; + u32 mem_size; + + if (!ctxm->entry_size || !ctx_pg) + return -EINVAL; + if (ctxm->instance_bmap) + n = hweight32(ctxm->instance_bmap); + if (ctxm->entry_multiple) + entries = roundup(entries, ctxm->entry_multiple); + entries = clamp_t(u32, entries, ctxm->min_entries, ctxm->max_entries); + mem_size = entries * ctxm->entry_size; + for (i = 0; i < n && !rc; i++) { + ctx_pg[i].entries = entries; + rc = bnxt_alloc_ctx_pg_tbls(bp, &ctx_pg[i], mem_size, pg_lvl, + ctxm->init_value ? ctxm : NULL); + } + return rc; +} + void bnxt_free_ctx_mem(struct bnxt *bp) { struct bnxt_ctx_mem_info *ctx = bp->ctx; @@ -7605,13 +7630,11 @@ void bnxt_free_ctx_mem(struct bnxt *bp) static int bnxt_alloc_ctx_mem(struct bnxt *bp) { - struct bnxt_ctx_pg_info *ctx_pg; struct bnxt_ctx_mem_type *ctxm; struct bnxt_ctx_mem_info *ctx; u32 l2_qps, qp1_qps, max_qps; - u32 mem_size, ena, entries; - u32 entries_sp, min; - u32 srqs, max_srqs; + u32 ena, entries_sp, entries; + u32 srqs, max_srqs, min; u32 num_mr, num_ah; u32 extra_srqs = 0; u32 extra_qps = 0; @@ -7642,61 +7665,37 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp) } ctxm = &ctx->ctx_arr[BNXT_CTX_QP]; - ctx_pg = ctxm->pg_info; - ctx_pg->entries = l2_qps + qp1_qps + extra_qps; - if (ctxm->entry_size) { - mem_size = ctxm->entry_size * ctx_pg->entries; - rc = bnxt_alloc_ctx_pg_tbls(bp, ctx_pg, mem_size, pg_lvl, ctxm); - if (rc) - return rc; - } + rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, l2_qps + qp1_qps + extra_qps, + pg_lvl); + if (rc) + return rc; ctxm = &ctx->ctx_arr[BNXT_CTX_SRQ]; - ctx_pg = ctxm->pg_info; - ctx_pg->entries = srqs + extra_srqs; - if (ctxm->entry_size) { - mem_size = ctxm->entry_size * ctx_pg->entries; - rc = bnxt_alloc_ctx_pg_tbls(bp, ctx_pg, mem_size, pg_lvl, ctxm); - if (rc) - return rc; - } + rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, srqs + extra_srqs, pg_lvl); + if (rc) + return rc; ctxm = &ctx->ctx_arr[BNXT_CTX_CQ]; - ctx_pg = ctxm->pg_info; - ctx_pg->entries = ctxm->cq_l2_entries + extra_qps * 2; - if (ctxm->entry_size) { - mem_size = ctxm->entry_size * ctx_pg->entries; - rc = bnxt_alloc_ctx_pg_tbls(bp, ctx_pg, mem_size, pg_lvl, ctxm); - if (rc) - return rc; - } + rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, ctxm->cq_l2_entries + + extra_qps * 2, pg_lvl); + if (rc) + return rc; ctxm = &ctx->ctx_arr[BNXT_CTX_VNIC]; - ctx_pg = ctxm->pg_info; - ctx_pg->entries = ctxm->max_entries; - if (ctxm->entry_size) { - mem_size = ctxm->entry_size * ctx_pg->entries; - rc = bnxt_alloc_ctx_pg_tbls(bp, ctx_pg, mem_size, 1, ctxm); - if (rc) - return rc; - } + rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, ctxm->max_entries, 1); + if (rc) + return rc; ctxm = &ctx->ctx_arr[BNXT_CTX_STAT]; - ctx_pg = ctxm->pg_info; - ctx_pg->entries = ctxm->max_entries; - if (ctxm->entry_size) { - mem_size = ctxm->entry_size * ctx_pg->entries; - rc = bnxt_alloc_ctx_pg_tbls(bp, ctx_pg, mem_size, 1, ctxm); - if (rc) - return rc; - } + rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, ctxm->max_entries, 1); + if (rc) + return rc; ena = 0; if (!(bp->flags & BNXT_FLAG_ROCE_CAP)) goto skip_rdma; ctxm = &ctx->ctx_arr[BNXT_CTX_MRAV]; - ctx_pg = ctxm->pg_info; /* 128K extra is needed to accommodate static AH context * allocation by f/w. */ @@ -7706,24 +7705,15 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp) if (!ctxm->mrav_av_entries || ctxm->mrav_av_entries > num_ah) ctxm->mrav_av_entries = num_ah; - ctx_pg->entries = num_mr + num_ah; - if (ctxm->entry_size) { - mem_size = ctxm->entry_size * ctx_pg->entries; - rc = bnxt_alloc_ctx_pg_tbls(bp, ctx_pg, mem_size, 2, ctxm); - if (rc) - return rc; - } + rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, num_mr + num_ah, 2); + if (rc) + return rc; ena = FUNC_BACKING_STORE_CFG_REQ_ENABLES_MRAV; ctxm = &ctx->ctx_arr[BNXT_CTX_TIM]; - ctx_pg = ctxm->pg_info; - ctx_pg->entries = l2_qps + qp1_qps + extra_qps; - if (ctxm->entry_size) { - mem_size = ctxm->entry_size * ctx_pg->entries; - rc = bnxt_alloc_ctx_pg_tbls(bp, ctx_pg, mem_size, 1, NULL); - if (rc) - return rc; - } + rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, l2_qps + qp1_qps + extra_qps, 1); + if (rc) + return rc; ena |= FUNC_BACKING_STORE_CFG_REQ_ENABLES_TIM; skip_rdma: @@ -7731,22 +7721,17 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp) min = ctxm->min_entries; entries_sp = ctx->ctx_arr[BNXT_CTX_VNIC].vnic_entries + l2_qps + 2 * (extra_qps + qp1_qps) + min; - entries_sp = roundup(entries_sp, ctxm->entry_multiple); + rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, entries_sp, 2); + if (rc) + return rc; + + ctxm = &ctx->ctx_arr[BNXT_CTX_FTQM]; entries = l2_qps + 2 * (extra_qps + qp1_qps); - entries = roundup(entries, ctxm->entry_multiple); - entries = clamp_t(u32, entries, min, ctxm->max_entries); - for (i = 0, ctx_pg = ctxm->pg_info; i < ctx->tqm_fp_rings_count + 1; - ctx_pg = &ctx->ctx_arr[BNXT_CTX_FTQM].pg_info[i], i++) { - ctx_pg->entries = i ? entries : entries_sp; - if (ctxm->entry_size) { - mem_size = ctxm->entry_size * ctx_pg->entries; - rc = bnxt_alloc_ctx_pg_tbls(bp, ctx_pg, mem_size, 1, - NULL); - if (rc) - return rc; - } + rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, entries, 2); + if (rc) + return rc; + for (i = 0; i < ctx->tqm_fp_rings_count + 1; i++) ena |= FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_SP << i; - } ena |= FUNC_BACKING_STORE_CFG_REQ_DFLT_ENABLES; rc = bnxt_hwrm_func_backing_store_cfg(bp, ena); if (rc) {