From patchwork Mon Nov 20 23:43:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Chan X-Patchwork-Id: 13462284 X-Patchwork-Delegate: kuba@kernel.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="X2q1CnU9" Received: from mail-qt1-x829.google.com (mail-qt1-x829.google.com [IPv6:2607:f8b0:4864:20::829]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6237395 for ; Mon, 20 Nov 2023 15:44:47 -0800 (PST) Received: by mail-qt1-x829.google.com with SMTP id d75a77b69052e-41cc535cd5cso28303511cf.2 for ; Mon, 20 Nov 2023 15:44:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1700523886; x=1701128686; darn=vger.kernel.org; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:from:to:cc:subject:date:message-id:reply-to; bh=113oq2Pt7E+2XS47rfNX7OdcNWpuPF2LkUNEcoXPJlw=; b=X2q1CnU9UFE3jxIWvUlKkIeduH/+Vb5qMmwdFSa1yTsQwRXP4zFhDVaGvZo1dl29jN fakPK99GImCSYpy5aO+UrI1BFNawvdo9iLha5bQ7CjBhv6n4CNaZKvfM0ix8AREQFzwI uknnZaQUz8D64eQeQYRBwq94mKzGqPVgcp1/o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1700523886; x=1701128686; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=113oq2Pt7E+2XS47rfNX7OdcNWpuPF2LkUNEcoXPJlw=; b=xIRT7+CXq1ps39a/JmMhVxqtR/DF+gtjLmumeN15P5XJXVgv7aoQEvXi0Y2ABf0c+a xnAsqIsBCtWaIuYrTO51/MJDNS57DnFI4sDz2Ei4DG05TCwoztYHm4ivmqvieH1+IgeH d7PsBasJJTGHZ0sxFeRNCC5HiqqZ1OaRhy4uvZThm3d4Suwggp0F7PreLB6OVjV5KmQj J4KfUo7Shv+ZuNmo1bzdhb1ja0Ro5Hf5fTIc0S4mT0wml74up4C4mmfImzAv+Yx3vOXr T2XAmswISBnzZd2b5g6B3NGtU1IwP4JJYYjnACK3ZwMJFFuASANG/VpH6FlP9n84Bedo CSZA== X-Gm-Message-State: AOJu0YypTCOz4eSi2w6iWXca5q+pMUmibi1joP8Tl077gEIZ48t8ldrn 9DdRoBlS2BCiNtRMJ7MAyJ0XUg== X-Google-Smtp-Source: AGHT+IHwOGVdv3ES6f86gaZKNqPnXza1A6rW8yxr1MXStZJ+om0QoZGFM3MtRMN3TuQANdF4xFh1Mg== X-Received: by 2002:ac8:5810:0:b0:418:1565:ed50 with SMTP id g16-20020ac85810000000b004181565ed50mr10968929qtg.66.1700523886389; Mon, 20 Nov 2023 15:44:46 -0800 (PST) Received: from lvnvda5233.lvn.broadcom.net ([192.19.161.250]) by smtp.gmail.com with ESMTPSA id i9-20020ac871c9000000b0041803dfb240sm3053384qtp.45.2023.11.20.15.44.45 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 Nov 2023 15:44:46 -0800 (PST) From: Michael Chan To: davem@davemloft.net Cc: netdev@vger.kernel.org, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, gospo@broadcom.com, Pavan Chebbi Subject: [PATCH net-next 07/13] bnxt_en: Add support for new backing store query firmware API Date: Mon, 20 Nov 2023 15:43:59 -0800 Message-Id: <20231120234405.194542-8-michael.chan@broadcom.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20231120234405.194542-1-michael.chan@broadcom.com> References: <20231120234405.194542-1-michael.chan@broadcom.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Use the new v2 firmware API if supported by the firmware. We now have the infrastructure to support the v2 API. Reviewed-by: Pavan Chebbi Signed-off-by: Michael Chan --- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 85 +++++++++++++++++++++-- drivers/net/ethernet/broadcom/bnxt/bnxt.h | 3 +- 2 files changed, 81 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c index e42c82ed0fd5..19da6c8f8650 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c @@ -7208,6 +7208,72 @@ static int bnxt_alloc_all_ctx_pg_info(struct bnxt *bp, int ctx_max) return 0; } +#define BNXT_CTX_INIT_VALID(flags) \ + (!!((flags) & \ + FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_ENABLE_CTX_KIND_INIT)) + +static int bnxt_hwrm_func_backing_store_qcaps_v2(struct bnxt *bp) +{ + struct hwrm_func_backing_store_qcaps_v2_output *resp; + struct hwrm_func_backing_store_qcaps_v2_input *req; + u16 last_valid_type = BNXT_CTX_INV; + struct bnxt_ctx_mem_info *ctx; + u16 type; + int rc; + + rc = hwrm_req_init(bp, req, HWRM_FUNC_BACKING_STORE_QCAPS_V2); + if (rc) + return rc; + + ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + bp->ctx = ctx; + + resp = hwrm_req_hold(bp, req); + + for (type = 0; type < BNXT_CTX_V2_MAX; ) { + struct bnxt_ctx_mem_type *ctxm = &ctx->ctx_arr[type]; + u8 init_val, init_off, i; + __le32 *p; + u32 flags; + + req->type = cpu_to_le16(type); + rc = hwrm_req_send(bp, req); + if (rc) + goto ctx_done; + flags = le32_to_cpu(resp->flags); + type = le16_to_cpu(resp->next_valid_type); + if (!(flags & FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_TYPE_VALID)) + continue; + + ctxm->type = le16_to_cpu(resp->type); + last_valid_type = ctxm->type; + ctxm->entry_size = le16_to_cpu(resp->entry_size); + ctxm->flags = flags; + ctxm->instance_bmap = le32_to_cpu(resp->instance_bit_map); + ctxm->entry_multiple = resp->entry_multiple; + ctxm->max_entries = le32_to_cpu(resp->max_num_entries); + ctxm->min_entries = le32_to_cpu(resp->min_num_entries); + init_val = resp->ctx_init_value; + init_off = resp->ctx_init_offset; + bnxt_init_ctx_initializer(ctxm, init_val, init_off, + BNXT_CTX_INIT_VALID(flags)); + ctxm->split_entry_cnt = min_t(u8, resp->subtype_valid_cnt, + BNXT_MAX_SPLIT_ENTRY); + for (i = 0, p = &resp->split_entry_0; i < ctxm->split_entry_cnt; + i++, p++) + ctxm->split[i] = le32_to_cpu(*p); + } + if (last_valid_type < BNXT_CTX_V2_MAX) + ctx->ctx_arr[last_valid_type].last = true; + rc = bnxt_alloc_all_ctx_pg_info(bp, BNXT_CTX_V2_MAX); + +ctx_done: + hwrm_req_drop(bp, req); + return rc; +} + static int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp) { struct hwrm_func_backing_store_qcaps_output *resp; @@ -7217,6 +7283,9 @@ static int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp) if (bp->hwrm_spec_code < 0x10902 || BNXT_VF(bp) || bp->ctx) return 0; + if (bp->fw_cap & BNXT_FW_CAP_BACKING_STORE_V2) + return bnxt_hwrm_func_backing_store_qcaps_v2(bp); + rc = hwrm_req_init(bp, req, HWRM_FUNC_BACKING_STORE_QCAPS); if (rc) return rc; @@ -7229,13 +7298,15 @@ static int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp) u8 init_val, init_idx = 0; u16 init_mask; - ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); + ctx = bp->ctx; if (!ctx) { - rc = -ENOMEM; - goto ctx_err; + ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); + if (!ctx) { + rc = -ENOMEM; + goto ctx_err; + } + bp->ctx = ctx; } - bp->ctx = ctx; - init_val = resp->ctx_kind_initializer; init_mask = le16_to_cpu(resp->ctx_init_mask); @@ -7607,7 +7678,7 @@ void bnxt_free_ctx_mem(struct bnxt *bp) if (!ctx) return; - for (type = 0; type < BNXT_CTX_MAX; type++) { + for (type = 0; type < BNXT_CTX_V2_MAX; type++) { struct bnxt_ctx_mem_type *ctxm = &ctx->ctx_arr[type]; struct bnxt_ctx_pg_info *ctx_pg = ctxm->pg_info; int i, n = 1; @@ -7914,6 +7985,8 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp) bp->fw_cap |= BNXT_FW_CAP_HOT_RESET_IF; if (BNXT_PF(bp) && (flags_ext & FUNC_QCAPS_RESP_FLAGS_EXT_FW_LIVEPATCH_SUPPORTED)) bp->fw_cap |= BNXT_FW_CAP_LIVEPATCH; + if (flags_ext & FUNC_QCAPS_RESP_FLAGS_EXT_BS_V2_SUPPORTED) + bp->fw_cap |= BNXT_FW_CAP_BACKING_STORE_V2; flags_ext2 = le32_to_cpu(resp->flags_ext2); if (flags_ext2 & FUNC_QCAPS_RESP_FLAGS_EXT2_RX_ALL_PKTS_TIMESTAMPS_SUPPORTED) diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.h b/drivers/net/ethernet/broadcom/bnxt/bnxt.h index 067a66eedf36..0dbf854530f1 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.h +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.h @@ -1608,7 +1608,7 @@ struct bnxt_ctx_mem_info { u32 flags; #define BNXT_CTX_FLAG_INITED 0x01 - struct bnxt_ctx_mem_type ctx_arr[BNXT_CTX_MAX]; + struct bnxt_ctx_mem_type ctx_arr[BNXT_CTX_V2_MAX]; }; enum bnxt_health_severity { @@ -2070,6 +2070,7 @@ struct bnxt { #define BNXT_FW_CAP_THRESHOLD_TEMP_SUPPORTED BIT_ULL(33) #define BNXT_FW_CAP_DFLT_VLAN_TPID_PCP BIT_ULL(34) #define BNXT_FW_CAP_PRE_RESV_VNICS BIT_ULL(35) + #define BNXT_FW_CAP_BACKING_STORE_V2 BIT_ULL(36) u32 fw_dbg_cap;