From patchwork Tue Dec 12 00:51:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Chan X-Patchwork-Id: 13488266 X-Patchwork-Delegate: kuba@kernel.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="DhSa6EHH" Received: from mail-qt1-x82a.google.com (mail-qt1-x82a.google.com [IPv6:2607:f8b0:4864:20::82a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9997299 for ; Mon, 11 Dec 2023 16:52:00 -0800 (PST) Received: by mail-qt1-x82a.google.com with SMTP id d75a77b69052e-423d9d508d1so37925921cf.1 for ; Mon, 11 Dec 2023 16:52:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1702342320; x=1702947120; darn=vger.kernel.org; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:from:to:cc:subject:date:message-id:reply-to; bh=Y31AXfseHY/Z2MxXIG+382UCPQ7kYpOYr14O/Eow5PY=; b=DhSa6EHH+hK3ilRr9ZLjs9Jks8wOWahu8JG2Icp8QN/soSDVVi8TItD4pHaboE6Jz1 U1EdUKXEInPMTDz7itiYEfi/hOv+ujF97WINi7M3ZAj3l45rm59rYGZb4andQqu8Bozi OSeFWaDsC0b4z1WRQ5T0k8R2BeOl99AaRH6t4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702342320; x=1702947120; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=Y31AXfseHY/Z2MxXIG+382UCPQ7kYpOYr14O/Eow5PY=; b=e+w5cjKi5lWs2sctrqVMwgcCqcB97HahFMFad6pdf+brcp1+z7dIvIkQ7M6kHHvpJj g3GnmHZvVuALSStbNgJxnN6KRB2D31nKt7teSzuI7STGv+7sxPrP123dDgxdOXL7r2XK JW9LobQQQFU7Ek/sYB1ZbWrzju+36M+AgYNBs0kYTvk8rsP4ON9/uCWXlbKAKISwu39B glxWrTQgG0/BNNfMjlCP6fYIjKRG3hk1kj0bjr6uhZJwIuIb2dWArSW3eeGJgu4jp6fc IXwaIq8Sg6rjP/lO1pF2f+ovp7JcxFszz3r88W0D3vfHqjVVkSY0Qj7bLtbbJAS+m4CU fbFg== X-Gm-Message-State: AOJu0Yw81ymSwczctNPrbA2j2U0S4D2ZoGqZGdRJMz4BpLIjd5j+bufS ARLNMk7ZIcYVwJNUracbFd4g6QgYMlLgj73/d5k= X-Google-Smtp-Source: AGHT+IHZizINclv8TsAsCbL7yHI0AqJ4xn4Sq3UBdijdduq+wVjMBLrpL/NA9s9orxUk5cYjPYdCRA== X-Received: by 2002:ac8:4e92:0:b0:41e:ae5a:2b96 with SMTP id 18-20020ac84e92000000b0041eae5a2b96mr8488650qtp.13.1702342319647; Mon, 11 Dec 2023 16:51:59 -0800 (PST) Received: from lvnvda5233.lvn.broadcom.net ([192.19.161.250]) by smtp.gmail.com with ESMTPSA id r5-20020ac87945000000b00423ea1b31b3sm3619664qtt.66.2023.12.11.16.51.58 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 11 Dec 2023 16:51:59 -0800 (PST) From: Michael Chan To: davem@davemloft.net Cc: netdev@vger.kernel.org, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, gospo@broadcom.com, Andy Gospodarek , Somnath Kotur Subject: [PATCH net-next 11/13] bnxt_en: Add support for UDP GSO on 5760X chips Date: Mon, 11 Dec 2023 16:51:20 -0800 Message-Id: <20231212005122.2401-12-michael.chan@broadcom.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20231212005122.2401-1-michael.chan@broadcom.com> References: <20231212005122.2401-1-michael.chan@broadcom.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The new 5760X chips supports UDP GSO. Tested using udpgso_bench_tx. Reviewed-by: Andy Gospodarek Reviewed-by: Somnath Kotur Signed-off-by: Michael Chan --- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 21 ++++++++++++++++++--- drivers/net/ethernet/broadcom/bnxt/bnxt.h | 1 + 2 files changed, 19 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c index 3594290e187a..be3fa0545fdc 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c @@ -587,12 +587,21 @@ static netdev_tx_t bnxt_start_xmit(struct sk_buff *skb, struct net_device *dev) txbd1->tx_bd_hsize_lflags = lflags; if (skb_is_gso(skb)) { + bool udp_gso = !!(skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4); u32 hdr_len; - if (skb->encapsulation) - hdr_len = skb_inner_tcp_all_headers(skb); - else + if (skb->encapsulation) { + if (udp_gso) + hdr_len = skb_inner_transport_offset(skb) + + sizeof(struct udphdr); + else + hdr_len = skb_inner_tcp_all_headers(skb); + } else if (udp_gso) { + hdr_len = skb_transport_offset(skb) + + sizeof(struct udphdr); + } else { hdr_len = skb_tcp_all_headers(skb); + } txbd1->tx_bd_hsize_lflags |= cpu_to_le32(TX_BD_FLAGS_LSO | TX_BD_FLAGS_T_IPID | @@ -8345,6 +8354,8 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp) flags_ext2 = le32_to_cpu(resp->flags_ext2); if (flags_ext2 & FUNC_QCAPS_RESP_FLAGS_EXT2_RX_ALL_PKTS_TIMESTAMPS_SUPPORTED) bp->fw_cap |= BNXT_FW_CAP_RX_ALL_PKT_TS; + if (flags_ext2 & FUNC_QCAPS_RESP_FLAGS_EXT2_UDP_GSO_SUPPORTED) + bp->flags |= BNXT_FLAG_UDP_GSO_CAP; bp->tx_push_thresh = 0; if ((flags & FUNC_QCAPS_RESP_FLAGS_PUSH_MODE_SUPPORTED) && @@ -14351,6 +14362,8 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_PARTIAL | NETIF_F_RXHASH | NETIF_F_RXCSUM | NETIF_F_GRO; + if (bp->flags & BNXT_FLAG_UDP_GSO_CAP) + dev->hw_features |= NETIF_F_GSO_UDP_L4; if (BNXT_SUPPORTS_TPA(bp)) dev->hw_features |= NETIF_F_LRO; @@ -14361,6 +14374,8 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) NETIF_F_GSO_UDP_TUNNEL | NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_IPXIP4 | NETIF_F_GSO_PARTIAL; + if (bp->flags & BNXT_FLAG_UDP_GSO_CAP) + dev->hw_enc_features |= NETIF_F_GSO_UDP_L4; if (bp->flags & BNXT_FLAG_CHIP_P7) dev->udp_tunnel_nic_info = &bnxt_udp_tunnels_p7; else diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.h b/drivers/net/ethernet/broadcom/bnxt/bnxt.h index 15d33f4a61c2..1269463b9b04 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.h +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.h @@ -2044,6 +2044,7 @@ struct bnxt { #define BNXT_FLAG_MULTI_HOST 0x100000 #define BNXT_FLAG_DSN_VALID 0x200000 #define BNXT_FLAG_DOUBLE_DB 0x400000 + #define BNXT_FLAG_UDP_GSO_CAP 0x800000 #define BNXT_FLAG_CHIP_NITRO_A0 0x1000000 #define BNXT_FLAG_DIM 0x2000000 #define BNXT_FLAG_ROCE_MIRROR_CAP 0x4000000