Message ID | 20240124102554.1327853-2-f.pfitzner@pengutronix.de (mailing list archive) |
---|---|
State | Changes Requested |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | net: phy: adin: add missing clock option | expand |
On Wed, 2024-01-24 at 11:25 +0100, Fabian Pfitzner wrote: > The ADIN1300 offers three distinct output clocks which can be accessed > through the GP_CLK pin. The DT only offers two of the possible options > and thus the 125MHz-recovered output clock is missing. > > As there is no other way to configure this pin than through the DT it > should be possible to do so for all available outputs. > > Signed-off-by: Fabian Pfitzner <f.pfitzner@pengutronix.de> > --- Reviewed-by: Nuno Sa <nuno.sa@analog.com> > drivers/net/phy/adin.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c > index 2e1a46e121d9..b1ed6fd24763 100644 > --- a/drivers/net/phy/adin.c > +++ b/drivers/net/phy/adin.c > @@ -508,6 +508,8 @@ static int adin_config_clk_out(struct phy_device *phydev) > sel |= ADIN1300_GE_CLK_CFG_25; > } else if (strcmp(val, "125mhz-free-running") == 0) { > sel |= ADIN1300_GE_CLK_CFG_FREE_125; > + } else if (strcmp(val, "125mhz-recovered") == 0) { > + sel |= ADIN1300_GE_CLK_CFG_RCVR_125; > } else if (strcmp(val, "adaptive-free-running") == 0) { > sel |= ADIN1300_GE_CLK_CFG_HRT_FREE; > } else {
diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c index 2e1a46e121d9..b1ed6fd24763 100644 --- a/drivers/net/phy/adin.c +++ b/drivers/net/phy/adin.c @@ -508,6 +508,8 @@ static int adin_config_clk_out(struct phy_device *phydev) sel |= ADIN1300_GE_CLK_CFG_25; } else if (strcmp(val, "125mhz-free-running") == 0) { sel |= ADIN1300_GE_CLK_CFG_FREE_125; + } else if (strcmp(val, "125mhz-recovered") == 0) { + sel |= ADIN1300_GE_CLK_CFG_RCVR_125; } else if (strcmp(val, "adaptive-free-running") == 0) { sel |= ADIN1300_GE_CLK_CFG_HRT_FREE; } else {
The ADIN1300 offers three distinct output clocks which can be accessed through the GP_CLK pin. The DT only offers two of the possible options and thus the 125MHz-recovered output clock is missing. As there is no other way to configure this pin than through the DT it should be possible to do so for all available outputs. Signed-off-by: Fabian Pfitzner <f.pfitzner@pengutronix.de> --- drivers/net/phy/adin.c | 2 ++ 1 file changed, 2 insertions(+)