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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Shay Drory , Maor Gottlieb , Tariq Toukan Subject: [PATCH net 1/6] net/mlx5: Lag, restore buckets number to default after hash LAG deactivation Date: Thu, 11 Apr 2024 14:54:39 +0300 Message-ID: <20240411115444.374475-2-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240411115444.374475-1-tariqt@nvidia.com> References: <20240411115444.374475-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD81:EE_|SA3PR12MB7952:EE_ X-MS-Office365-Filtering-Correlation-Id: dea5e423-6a16-4f47-8104-08dc5a1e4e81 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: np1VIxbmMReTZils+wyS7kyEaplac7f2K7mui/VBzeWqrYarnrnO7ML/FAu7IGyRvV12DoxDrqJNR8gQuMeWs7WHGXcedMfqgljgGbIlUU2UI9R4E+twEFONNQj7hw3gbIJ/pF99ITHEOj2WJTlIuliVcFYfY/HMO6JPVM64OvvqCHROjMaYJPlEr/vLk5QQ8tt/JrGh+lP2tr6WK07y4qhzhFM26OEpUI3claN4ffKCrtOE7KtmNFueUpLYBPSTlxh9rhGxzunCXLx2n47HO/YLGX+wxx22t9STusP1vOx+bVM/wQZDCaZNm9i44svTIsSWJWHaIGtNsnJ+hUwgWcV8fivRZO8zStxLFxaAtnk3AJhSv5Fszxj3yD0Z224cv2OKq+/GMHX5+N4YkiYr3TN297mr8UXeziVcKuwpChgvP+sxW1BchI8/gPJ3qRcqFAaYgFvPTco5IornUFmneqv/zf9mcj5RAqWI+nQwlBAlQu5bL6vKFqfhgVU/2xbZFuwDG0iXwGr/i39jEH2VgZcpjKTx7WIAB2hq+Kn4pqj0zGYWI3dYxoSYTLU23KVpt2v37Nk3YBmcf2caKNb1zPLzck/+462skZyRy6VqYK/4hgmRuvW0QVJcEVUJmrJ8GyAsuvEMThPJYy2jldKwuKHjXSD1WYtRr4OpN3E+AkK9w1bsYjvq9e1Io6pez+KsXRtm/J0byjnZDz+ovrE2AaL83f1usYdKRFJtys3jUzfCLKxXPndNhFZAuOwuJGoV X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230031)(376005)(82310400014)(1800799015)(36860700004);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Apr 2024 11:55:39.0834 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dea5e423-6a16-4f47-8104-08dc5a1e4e81 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD81.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB7952 X-Patchwork-Delegate: kuba@kernel.org From: Shay Drory The cited patch introduces the concept of buckets in LAG in hash mode. However, the patch doesn't clear the number of buckets in the LAG deactivation. This results in using the wrong number of buckets in case user create a hash mode LAG and afterwards create a non-hash mode LAG. Hence, restore buckets number to default after hash mode LAG deactivation. Fixes: 352899f384d4 ("net/mlx5: Lag, use buckets in hash mode") Signed-off-by: Shay Drory Reviewed-by: Maor Gottlieb Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c index d14459e5c04f..69d482f7c5a2 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c @@ -703,8 +703,10 @@ int mlx5_deactivate_lag(struct mlx5_lag *ldev) return err; } - if (test_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, &flags)) + if (test_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, &flags)) { mlx5_lag_port_sel_destroy(ldev); + ldev->buckets = 1; + } if (mlx5_lag_has_drop_rule(ldev)) mlx5_lag_drop_rule_cleanup(ldev);