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(p5315239-ipxg23901hodogaya.kanagawa.ocn.ne.jp. [180.34.87.239]) by smtp.gmail.com with ESMTPSA id s27-20020a63525b000000b006008ee7e805sm5644940pgl.30.2024.04.24.18.05.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Apr 2024 18:05:30 -0700 (PDT) From: FUJITA Tomonori To: netdev@vger.kernel.org Cc: andrew@lunn.ch, horms@kernel.org Subject: [PATCH net-next v2 5/6] net: tn40xx: add mdio bus support Date: Thu, 25 Apr 2024 10:03:53 +0900 Message-Id: <20240425010354.32605-6-fujita.tomonori@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240425010354.32605-1-fujita.tomonori@gmail.com> References: <20240425010354.32605-1-fujita.tomonori@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org This patch adds supports for mdio bus. A later path adds PHYLIB support on the top of this. Signed-off-by: FUJITA Tomonori --- drivers/net/ethernet/tehuti/Makefile | 2 +- drivers/net/ethernet/tehuti/tn40.c | 7 +- drivers/net/ethernet/tehuti/tn40.h | 4 + drivers/net/ethernet/tehuti/tn40_mdio.c | 129 ++++++++++++++++++++++++ 4 files changed, 140 insertions(+), 2 deletions(-) create mode 100644 drivers/net/ethernet/tehuti/tn40_mdio.c diff --git a/drivers/net/ethernet/tehuti/Makefile b/drivers/net/ethernet/tehuti/Makefile index 1c468d99e476..7a0fe586a243 100644 --- a/drivers/net/ethernet/tehuti/Makefile +++ b/drivers/net/ethernet/tehuti/Makefile @@ -5,5 +5,5 @@ obj-$(CONFIG_TEHUTI) += tehuti.o -tn40xx-y := tn40.o +tn40xx-y := tn40.o tn40_mdio.o obj-$(CONFIG_TEHUTI_TN40) += tn40xx.o diff --git a/drivers/net/ethernet/tehuti/tn40.c b/drivers/net/ethernet/tehuti/tn40.c index f676fc6e1d3a..0b8a063adb8c 100644 --- a/drivers/net/ethernet/tehuti/tn40.c +++ b/drivers/net/ethernet/tehuti/tn40.c @@ -1760,8 +1760,13 @@ static int tn40_probe(struct pci_dev *pdev, const struct pci_device_id *ent) goto err_unset_drvdata; } - priv->stats_flag = ((read_reg(priv, FPGA_VER) & 0xFFF) != 308); + ret = tn40_mdiobus_init(priv); + if (ret) { + dev_err(&pdev->dev, "failed to initialize mdio bus.\n"); + goto err_free_irq; + } + priv->stats_flag = ((read_reg(priv, FPGA_VER) & 0xFFF) != 308); priv->isr_mask = IR_RX_FREE_0 | IR_LNKCHG0 | IR_PSE | IR_TMR0 | IR_RX_DESC_0 | IR_TX_FREE_0 | IR_TMR1; diff --git a/drivers/net/ethernet/tehuti/tn40.h b/drivers/net/ethernet/tehuti/tn40.h index 2c24f75cab03..0f39dc70f37c 100644 --- a/drivers/net/ethernet/tehuti/tn40.h +++ b/drivers/net/ethernet/tehuti/tn40.h @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -176,6 +177,7 @@ struct tn40_priv { char *b0_va; /* Virtual address of buffer */ struct rx_page_table rx_page_table; + struct mii_bus *mdio; }; /* RX FREE descriptor - 64bit */ @@ -262,4 +264,6 @@ static inline void write_reg(struct tn40_priv *priv, u32 reg, u32 val) writel(val, priv->regs + reg); } +int tn40_mdiobus_init(struct tn40_priv *priv); + #endif /* _TN40XX_H */ diff --git a/drivers/net/ethernet/tehuti/tn40_mdio.c b/drivers/net/ethernet/tehuti/tn40_mdio.c new file mode 100644 index 000000000000..c00421427f20 --- /dev/null +++ b/drivers/net/ethernet/tehuti/tn40_mdio.c @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* Copyright (c) Tehuti Networks Ltd. */ + +#include "tn40.h" + +static void mdio_set_speed(struct tn40_priv *priv, u32 speed) +{ + void __iomem *regs = priv->regs; + int mdio_cfg; + + mdio_cfg = readl(regs + REG_MDIO_CMD_STAT); + if (speed == 1) + mdio_cfg = (0x7d << 7) | 0x08; /* 1MHz */ + else + mdio_cfg = 0xA08; /* 6MHz */ + mdio_cfg |= (1 << 6); + writel(mdio_cfg, regs + REG_MDIO_CMD_STAT); + msleep(100); +} + +static u32 mdio_stat(struct tn40_priv *priv) +{ + void __iomem *regs = priv->regs; + + return readl(regs + REG_MDIO_CMD_STAT); +} + +static int mdio_get(struct tn40_priv *priv, u32 *val) +{ + u32 stat; + int ret; + + ret = readx_poll_timeout_atomic(mdio_stat, priv, stat, + GET_MDIO_BUSY(stat) == 0, 10, 10000); + return ret; +} + +static int tn40_mdio_read(struct tn40_priv *priv, int port, int device, + u16 regnum) +{ + void __iomem *regs = priv->regs; + u32 tmp_reg, i; + + /* wait until MDIO is not busy */ + if (mdio_get(priv, NULL)) + return -EIO; + + i = ((device & 0x1F) | ((port & 0x1F) << 5)); + writel(i, regs + REG_MDIO_CMD); + writel((u32)regnum, regs + REG_MDIO_ADDR); + if (mdio_get(priv, NULL)) + return -EIO; + + writel(((1 << 15) | i), regs + REG_MDIO_CMD); + /* read CMD_STAT until not busy */ + if (mdio_get(priv, NULL)) + return -EIO; + + tmp_reg = readl(regs + REG_MDIO_DATA); + return lower_16_bits(tmp_reg); +} + +static int tn40_mdio_write(struct tn40_priv *priv, int port, int device, + u16 regnum, u16 data) +{ + void __iomem *regs = priv->regs; + u32 tmp_reg = 0; + int ret; + + /* wait until MDIO is not busy */ + if (mdio_get(priv, NULL)) + return -EIO; + writel(((device & 0x1F) | ((port & 0x1F) << 5)), regs + REG_MDIO_CMD); + writel((u32)regnum, regs + REG_MDIO_ADDR); + if (mdio_get(priv, NULL)) + return -EIO; + writel((u32)data, regs + REG_MDIO_DATA); + /* read CMD_STAT until not busy */ + ret = mdio_get(priv, &tmp_reg); + if (ret) + return -EIO; + + if (GET_MDIO_RD_ERR(tmp_reg)) { + dev_err(&priv->pdev->dev, "MDIO error after write command\n"); + return -EIO; + } + return 0; +} + +static int mdio_read(struct mii_bus *mii_bus, int addr, int devnum, int regnum) +{ + return tn40_mdio_read(mii_bus->priv, addr, devnum, regnum); +} + +static int mdio_write(struct mii_bus *mii_bus, int addr, int devnum, + int regnum, u16 val) +{ + return tn40_mdio_write(mii_bus->priv, addr, devnum, regnum, val); +} + +int tn40_mdiobus_init(struct tn40_priv *priv) +{ + struct pci_dev *pdev = priv->pdev; + struct mii_bus *bus; + int ret; + + bus = devm_mdiobus_alloc(&pdev->dev); + if (!bus) + return -ENOMEM; + + bus->name = TN40_DRV_NAME; + bus->parent = &pdev->dev; + snprintf(bus->id, MII_BUS_ID_SIZE, "tn40xx-%x-%x", + pci_domain_nr(pdev->bus), pci_dev_id(pdev)); + bus->priv = priv; + + bus->read_c45 = mdio_read; + bus->write_c45 = mdio_write; + + ret = devm_mdiobus_register(&pdev->dev, bus); + if (ret) { + dev_err(&pdev->dev, "failed to register mdiobus %d %u %u\n", + ret, bus->state, MDIOBUS_UNREGISTERED); + return ret; + } + mdio_set_speed(priv, MDIO_SPEED_6MHZ); + priv->mdio = bus; + return 0; +}