From patchwork Tue Apr 30 08:37:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648468 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A04C1272C6; Tue, 30 Apr 2024 08:39:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466355; cv=none; b=SvsjYCcXlv5ps3TlAQXTw2YtxUmaedhE1UCm0lRA+T43fWlgFTsNXbUhnp6mqVdcYsFncMtoaY/G4iwCM4nmCEcGlhk8az5YZMli04GZMxoRYz5AXOH7mjGweHur+W3dOV3/mN4YFDzQiZBvRipnY6YblL7quswjMMvmqyqezAM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466355; c=relaxed/simple; bh=yQQIcYbRYc84C9+sU9Mw4x3Hg7aHXuq5GPfutfglw58=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=D85arKlNTTS6HZD55bUKQrvNejaTm5423VwmIYn2TjNBEzEre9h/lNV7dZkeln/NNByzdp1xKgVJOF9+GYnmMMojJ7XjdCLwGX9mRc/qoB5wOBVv8r824Zabmtm1aykk45DblYuiUbTRng+PcoeTsb7NxJhqEmChNhS9cE6aHbQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=i9REab5R; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="i9REab5R" Received: by mail.gandi.net (Postfix) with ESMTPA id 528492000B; Tue, 30 Apr 2024 08:39:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466351; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qWz5W3H1K/5hoRA60ibUkKhWpaUcvtXlrgxGqSMHDyg=; b=i9REab5R16i2TBWSrVxDiCTgdfngr9MAdImqM+UmYIebxm9Evtc4JU8Dj/qKqf4BkVXN3Y HJxDX+xWQSLScAxOn4r2iLjpFz0uiplKnZbBmod+3dbgcp90McRgYmZQ3dO8HC0bAdzfgd V3uxPoJ7IVR2+21AR8LofvVs3Z9qH1gsG8YN7Jf5CXnjdGIbGoXRDAWLnkjSq6KxZsIydH 25hrjt0sjG4s85T6ab8uVVAP2leivuj+WqokFv5NJbSUfVQMKrtf5PwuX1C2z6LFSIXgCe 9gbAzV7zJ+48nUeZ8n8TStwCqCKFrzQrZh3Im4aQtgh+2Ugz8KfGU+OvEhockw== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Subject: [PATCH 02/17] reset: mchp: sparx5: Remove dependencies and allow building as a module Date: Tue, 30 Apr 2024 10:37:11 +0200 Message-ID: <20240430083730.134918-3-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com From: Clément Léger The sparx5 reset controller depends on the SPARX5 architecture or the LAN966x SoC. This reset controller can be used by the LAN966x PCI device and so it needs to be available on all architectures. Also the LAN966x PCI device driver can be built as a module and this reset controller driver has no reason to be a builtin driver in that case. Signed-off-by: Clément Léger Signed-off-by: Herve Codina --- drivers/reset/Kconfig | 3 +-- drivers/reset/reset-microchip-sparx5.c | 2 ++ 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 85b27c42cf65..04dbfe317fc7 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -124,8 +124,7 @@ config RESET_LPC18XX This enables the reset controller driver for NXP LPC18xx/43xx SoCs. config RESET_MCHP_SPARX5 - bool "Microchip Sparx5 reset driver" - depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST + tristate "Microchip Sparx5 reset driver" default y if SPARX5_SWITCH select MFD_SYSCON help diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-microchip-sparx5.c index 636e85c388b0..69915c7b4941 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -158,6 +158,7 @@ static const struct of_device_id mchp_sparx5_reset_of_match[] = { }, { } }; +MODULE_DEVICE_TABLE(of, mchp_sparx5_reset_of_match); static struct platform_driver mchp_sparx5_reset_driver = { .probe = mchp_sparx5_reset_probe, @@ -180,3 +181,4 @@ postcore_initcall(mchp_sparx5_reset_init); MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver"); MODULE_AUTHOR("Steen Hegelund "); +MODULE_LICENSE("GPL");