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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Dragos Tatulea , Tariq Toukan Subject: [PATCH net-next 04/15] net/mlx5e: SHAMPO, Fix FCS config when HW GRO on Date: Tue, 28 May 2024 17:27:56 +0300 Message-ID: <20240528142807.903965-5-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240528142807.903965-1-tariqt@nvidia.com> References: <20240528142807.903965-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00004685:EE_|DS0PR12MB7778:EE_ X-MS-Office365-Filtering-Correlation-Id: a6a70c3d-4986-4f2f-1ec9-08dc7f2295f2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|36860700004|82310400017|376005|1800799015; X-Microsoft-Antispam-Message-Info: 16TN+FOKunaaJ32/qalFY4Fk1rYSO+BxCMYxUAhkQA6RgCXTr1Sz0ou9Il+iofar5Nlo05yFCq14scftjEkNVwSKmJGfvO6uOAGOpgF837prBqy1y+qTUJVomKNFZ49z+cKRv3QkXQyTIzR58cq11z1gXV6w6iPrR/tbrFE6a6c8ddC1t9NL35Pme1o+XZS/A6ftECCWkBSGtfdrR29Wf8kNMB90xz6u7fq7MxDIfv0ktGHS/WcinODBvVs5qLRaYmkjgKls7geVadu1vTueJiQNzKIxOsBM02SlJXE+amqqwy9voC4Pl+FXhJSPMC6u6LPfx1savbLhDvfBKdP0Up44+IjNM4YFGpheXI2vaxXNEnpWIDwVwetmcFV0LNzRb6/eoqVwtFJpl15lJ6eq1A6TQlIN4w4rM5Wgd2UvsGCCDhQmNvj3egWqGJ1XDCaEtRfglUDHpnC9Rv4mSehJ+pol6T/7Rk6JgTiDYBFiVza4JXlcH5Bu9lgJZio5/m6w0QCAy3FS3firQp33pOGHaBRC/In9gf/dyYco8J2UilYnrGHBLfP8GnWHGb8lrX5mngfEcdzdQMnN3W1kzs1GpfPWsKmTvb6YJaYqAxitYRg27ZrbbGTlkhCt4Jh44yOUMgJNBqLN6zZpOuGERVwFlvdZmRtkw1eZI4rOQ7cNBO34DDbzOxIOGvPdRuyit3Lr+h/mNQr/K5FS9rDY28lvoNapcNxfoq23U3ex5z5+PfaEHPRVfwjnZ34+2Q2XzfRHtm9P0nSIEfcgKWXtRSMtiDaz4VNmTBboAo8TuhaFzOwkRXpc6v8079drvP6PDdoiJ517Nxh/EjRNzn4VLr+WKp8Xt6Y/uCGxM56dGCBfevfkonY3BXhFc9QQ2JNVvz2W0DR46mvJ3aiChaXgwI/NTcNpcUIDI1erMypUeqa5PHkVZ7ShgtRvGxno3N0RlSZSn0+oe8GtGzfqLQRoZLlHs1dORHdk/iVGnYavf1Tt2DxjJhyskRu5gdSdiWp+165gF+fuiLplocwxAMWbINqnfQwQyqK0u3FzoHCV6ROaB+mmJ5uGbxKPoJB/wI2CT3PiFCm/pY3Vngra0a10UQ943hSDlHOBl5A+1zFXgIbR5ZUkrExnqQQHV7TiKTnvQvca1xeACAeKiCGBvr3wH08bQXToZ4Gm/S97Q5MKUsSkQTkOeEk6wGD55qdGPhs7+k+IdyttgVW2Z8eQXaqWPXZ6IW/EW+ZeDORmyOBZbxWHvX4VjeCtMleiJH2TAvcPNU1vdCkpIdmpuAIQvx3b9U0lc4Gkos4jUj1SeXNVap+vsj5DXWfvRBkQffCwyCjnCYN4lTglr9sCZff9HNE2AwJXKuM/NXZPrz0Mifnxp5LsQBRXXHl5E/1MiLu7qDi/Ia8y X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230031)(36860700004)(82310400017)(376005)(1800799015);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 May 2024 14:29:29.8556 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a6a70c3d-4986-4f2f-1ec9-08dc7f2295f2 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004685.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7778 X-Patchwork-Delegate: kuba@kernel.org From: Dragos Tatulea For the following scenario: ethtool --features eth3 rx-gro-hw on ethtool --features eth3 rx-fcs on ethtool --features eth3 rx-fcs off ... there is a firmware error because the driver enables HW GRO first while FCS is still enabled. This patch fixes this by swapping the order of HW GRO and FCS for this specific case. Take LRO into consideration as well for consistency. Signed-off-by: Dragos Tatulea Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index b758bc72ac36..1b999bf8d3a0 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -4259,13 +4259,19 @@ int mlx5e_set_features(struct net_device *netdev, netdev_features_t features) #define MLX5E_HANDLE_FEATURE(feature, handler) \ mlx5e_handle_feature(netdev, &oper_features, feature, handler) - err |= MLX5E_HANDLE_FEATURE(NETIF_F_LRO, set_feature_lro); - err |= MLX5E_HANDLE_FEATURE(NETIF_F_GRO_HW, set_feature_hw_gro); + if (features & (NETIF_F_GRO_HW | NETIF_F_LRO)) { + err |= MLX5E_HANDLE_FEATURE(NETIF_F_RXFCS, set_feature_rx_fcs); + err |= MLX5E_HANDLE_FEATURE(NETIF_F_LRO, set_feature_lro); + err |= MLX5E_HANDLE_FEATURE(NETIF_F_GRO_HW, set_feature_hw_gro); + } else { + err |= MLX5E_HANDLE_FEATURE(NETIF_F_LRO, set_feature_lro); + err |= MLX5E_HANDLE_FEATURE(NETIF_F_GRO_HW, set_feature_hw_gro); + err |= MLX5E_HANDLE_FEATURE(NETIF_F_RXFCS, set_feature_rx_fcs); + } err |= MLX5E_HANDLE_FEATURE(NETIF_F_HW_VLAN_CTAG_FILTER, set_feature_cvlan_filter); err |= MLX5E_HANDLE_FEATURE(NETIF_F_HW_TC, set_feature_hw_tc); err |= MLX5E_HANDLE_FEATURE(NETIF_F_RXALL, set_feature_rx_all); - err |= MLX5E_HANDLE_FEATURE(NETIF_F_RXFCS, set_feature_rx_fcs); err |= MLX5E_HANDLE_FEATURE(NETIF_F_HW_VLAN_CTAG_RX, set_feature_rx_vlan); #ifdef CONFIG_MLX5_EN_ARFS err |= MLX5E_HANDLE_FEATURE(NETIF_F_NTUPLE, set_feature_arfs);