From patchwork Fri Jun 21 12:20:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?U2t5TGFrZSBIdWFuZyAo6buD5ZWf5r6kKQ==?= X-Patchwork-Id: 13707491 X-Patchwork-Delegate: kuba@kernel.org Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9E0ED14F9F0; Fri, 21 Jun 2024 12:24:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718972686; cv=none; b=EFjSDVaWCfsIiGJraxDArWRjuqGkOpLgxcBPLTTX0fnTweg7MmffcDGFOwNMHm6RvjF+w90nSWFsm9Y8EEm3psfoyNZDLP+fMiK+8RcVEihrEg5qvNdrZQR2TnSH7oxd2YOTW3O5Ivd5GrmwV4Ch8FV55j3qj1Sbv+SKRtsc5VY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718972686; c=relaxed/simple; bh=/qHZ0bxuAcdLeLDreDyaZab2f5PORQTtG41sdSqE6EM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=YVFvXwtVjxHnlA5m6nSn8at6kd04CfMRap6WUEB/bDnszjKV/uD/4oZTFvqmR/VcXkMCcgCBkwVMZsjz17qcZ2UAmKzR0+3FWr75peqfcVd45EkJjJvX4DXHLY5x3HabvyrxvZSxlN+3ArA3mLAi+U9y+VIrClekj3GfGJSvorw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=GKuzOmtF; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="GKuzOmtF" X-UUID: 3a7fc55a2fc911ef99dc3f8fac2c3230-20240621 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=ASE2ff45mfI6yNO/aB24qN2kLFL28P2tFrAH7hx3tcw=; b=GKuzOmtFHcRkK8rg4uPH66Y29y5isi6sjgKFdjDRdy3xnjHvwfgDB5JgkIw3pqaY3Gn60XDXMlpUuU9QMLKXSS2yQHHHqLOzR8+XjY2Q41dJ5+6JF89Hd+Arog7S7Lp/Hknhhdc9k/CEkEbZSGnH0loQNTvTNjDkrvMjUNfd3zo=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.39,REQID:71d640fb-9bbf-4aa6-b4fb-2517c574bf18,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:393d96e,CLOUDID:3fc0df88-8d4f-477b-89d2-1e3bdbef96d1,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 3a7fc55a2fc911ef99dc3f8fac2c3230-20240621 Received: from mtkmbs09n2.mediatek.inc [(172.21.101.94)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 600363953; Fri, 21 Jun 2024 20:24:38 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by MTKMBS09N2.mediatek.inc (172.21.101.94) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 21 Jun 2024 05:24:37 -0700 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 21 Jun 2024 20:24:37 +0800 From: Sky Huang To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Daniel Golle , Qingfang Deng , SkyLake Huang , Matthias Brugger , AngeloGioacchino Del Regno , , , , CC: Steven Liu , SkyLake.Huang Subject: [PATCH net-next v8 06/13] net: phy: mediatek: Hook LED helper functions in mtk-ge.c Date: Fri, 21 Jun 2024 20:20:38 +0800 Message-ID: <20240621122045.30732-7-SkyLake.Huang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240621122045.30732-1-SkyLake.Huang@mediatek.com> References: <20240621122045.30732-1-SkyLake.Huang@mediatek.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N X-Patchwork-Delegate: kuba@kernel.org From: "SkyLake.Huang" We have mtk-phy-lib.c now so that we can use LED helper functions in mtk-ge.c(mt7531 part). It also means that mt7531/mt7981/mt7988's Giga ethernet phys share almost the same HW LED controller design. Also, add probe function for mt7531 so that it can initialize LED state. Signed-off-by: SkyLake.Huang --- drivers/net/phy/mediatek/mtk-ge.c | 105 ++++++++++++++++++++++++++++++ 1 file changed, 105 insertions(+) diff --git a/drivers/net/phy/mediatek/mtk-ge.c b/drivers/net/phy/mediatek/mtk-ge.c index 9122899..c338bba 100644 --- a/drivers/net/phy/mediatek/mtk-ge.c +++ b/drivers/net/phy/mediatek/mtk-ge.c @@ -13,6 +13,10 @@ #define MTK_PHY_PAGE_EXTENDED_2A30 0x2a30 #define MTK_PHY_PAGE_EXTENDED_52B5 0x52b5 +struct mtk_gephy_priv { + unsigned long led_state; +}; + static void mtk_gephy_config_init(struct phy_device *phydev) { /* Enable HW auto downshift */ @@ -57,6 +61,101 @@ static int mt7531_phy_config_init(struct phy_device *phydev) return 0; } +static int mt7531_phy_probe(struct phy_device *phydev) +{ + struct mtk_gephy_priv *priv; + + priv = devm_kzalloc(&phydev->mdio.dev, sizeof(struct mtk_gephy_priv), + GFP_KERNEL); + if (!priv) + return -ENOMEM; + + phydev->priv = priv; + + mtk_phy_leds_state_init(phydev); + + return 0; +} + +static int mt753x_phy_led_blink_set(struct phy_device *phydev, u8 index, + unsigned long *delay_on, + unsigned long *delay_off) +{ + struct mtk_gephy_priv *priv = phydev->priv; + bool blinking = false; + int err = 0; + + if (index > 1) + return -EINVAL; + + if (delay_on && delay_off && (*delay_on > 0) && (*delay_off > 0)) { + blinking = true; + *delay_on = 50; + *delay_off = 50; + } + + err = mtk_phy_hw_led_blink_set(phydev, index, &priv->led_state, + blinking); + if (err) + return err; + + return mtk_phy_hw_led_on_set(phydev, index, &priv->led_state, + MTK_GPHY_LED_ON_MASK, false); +} + +static int mt753x_phy_led_brightness_set(struct phy_device *phydev, + u8 index, enum led_brightness value) +{ + struct mtk_gephy_priv *priv = phydev->priv; + int err; + + err = mtk_phy_hw_led_blink_set(phydev, index, &priv->led_state, false); + if (err) + return err; + + return mtk_phy_hw_led_on_set(phydev, index, &priv->led_state, + MTK_GPHY_LED_ON_MASK, (value != LED_OFF)); +} + +static const unsigned long supported_triggers = + (BIT(TRIGGER_NETDEV_FULL_DUPLEX) | + BIT(TRIGGER_NETDEV_HALF_DUPLEX) | + BIT(TRIGGER_NETDEV_LINK) | + BIT(TRIGGER_NETDEV_LINK_10) | + BIT(TRIGGER_NETDEV_LINK_100) | + BIT(TRIGGER_NETDEV_LINK_1000) | + BIT(TRIGGER_NETDEV_RX) | + BIT(TRIGGER_NETDEV_TX)); + +static int mt753x_phy_led_hw_is_supported(struct phy_device *phydev, u8 index, + unsigned long rules) +{ + return mtk_phy_led_hw_is_supported(phydev, index, rules, + supported_triggers); +} + +static int mt753x_phy_led_hw_control_get(struct phy_device *phydev, u8 index, + unsigned long *rules) +{ + struct mtk_gephy_priv *priv = phydev->priv; + + return mtk_phy_led_hw_ctrl_get(phydev, index, rules, &priv->led_state, + MTK_GPHY_LED_ON_SET, + MTK_GPHY_LED_RX_BLINK_SET, + MTK_GPHY_LED_TX_BLINK_SET); +}; + +static int mt753x_phy_led_hw_control_set(struct phy_device *phydev, u8 index, + unsigned long rules) +{ + struct mtk_gephy_priv *priv = phydev->priv; + + return mtk_phy_led_hw_ctrl_set(phydev, index, rules, &priv->led_state, + MTK_GPHY_LED_ON_SET, + MTK_GPHY_LED_RX_BLINK_SET, + MTK_GPHY_LED_TX_BLINK_SET); +}; + static struct phy_driver mtk_gephy_driver[] = { { PHY_ID_MATCH_EXACT(0x03a29412), @@ -75,6 +174,7 @@ static struct phy_driver mtk_gephy_driver[] = { { PHY_ID_MATCH_EXACT(0x03a29441), .name = "MediaTek MT7531 PHY", + .probe = mt7531_phy_probe, .config_init = mt7531_phy_config_init, /* Interrupts are handled by the switch, not the PHY * itself. @@ -85,6 +185,11 @@ static struct phy_driver mtk_gephy_driver[] = { .resume = genphy_resume, .read_page = mtk_phy_read_page, .write_page = mtk_phy_write_page, + .led_blink_set = mt753x_phy_led_blink_set, + .led_brightness_set = mt753x_phy_led_brightness_set, + .led_hw_is_supported = mt753x_phy_led_hw_is_supported, + .led_hw_control_set = mt753x_phy_led_hw_control_set, + .led_hw_control_get = mt753x_phy_led_hw_control_get, }, };