diff mbox series

[v3,1/3] bus: mhi: host: Add Foxconn SDX72 related support

Message ID 20240628073605.1447218-1-slark_xiao@163.com (mailing list archive)
State Superseded
Headers show
Series [v3,1/3] bus: mhi: host: Add Foxconn SDX72 related support | expand

Checks

Context Check Description
netdev/tree_selection success Guessing tree name failed - patch did not apply

Commit Message

Slark Xiao June 28, 2024, 7:36 a.m. UTC
Align with Qcom SDX72, add ready timeout item for Foxconn SDX72.
And also, add firehose support since SDX72.

Signed-off-by: Slark Xiao <slark_xiao@163.com>
---
v2: (1). Update the edl file path and name (2). Set SDX72 support
trigger edl mode by default
v3: Divide into 2 parts for Foxconn sdx72 platform
---
 drivers/bus/mhi/host/pci_generic.c | 43 ++++++++++++++++++++++++++++++
 1 file changed, 43 insertions(+)

Comments

Dmitry Baryshkov June 28, 2024, 7:51 a.m. UTC | #1
On Fri, Jun 28, 2024 at 03:36:05PM GMT, Slark Xiao wrote:
> Align with Qcom SDX72, add ready timeout item for Foxconn SDX72.
> And also, add firehose support since SDX72.
> 
> Signed-off-by: Slark Xiao <slark_xiao@163.com>
> ---
> v2: (1). Update the edl file path and name (2). Set SDX72 support
> trigger edl mode by default
> v3: Divide into 2 parts for Foxconn sdx72 platform

Generic comment: please send all the patches using a single
git-send-email command. This way it will thread them properly, so that
they form a single patchseries in developers's mail clients. Or you can
just use 'b4' tool to manage and send the patchset.

> ---
>  drivers/bus/mhi/host/pci_generic.c | 43 ++++++++++++++++++++++++++++++
>  1 file changed, 43 insertions(+)
>
Slark Xiao June 28, 2024, 8:31 a.m. UTC | #2
At 2024-06-28 15:51:54, "Dmitry Baryshkov" <dmitry.baryshkov@linaro.org> wrote:
>On Fri, Jun 28, 2024 at 03:36:05PM GMT, Slark Xiao wrote:
>> Align with Qcom SDX72, add ready timeout item for Foxconn SDX72.
>> And also, add firehose support since SDX72.
>> 
>> Signed-off-by: Slark Xiao <slark_xiao@163.com>
>> ---
>> v2: (1). Update the edl file path and name (2). Set SDX72 support
>> trigger edl mode by default
>> v3: Divide into 2 parts for Foxconn sdx72 platform
>
>Generic comment: please send all the patches using a single
>git-send-email command. This way it will thread them properly, so that
>they form a single patchseries in developers's mail clients. Or you can
>just use 'b4' tool to manage and send the patchset.
>

Send again with command "git send-email v3-*.patch ...". Please take a view on that.
Thanks.

>> ---
>>  drivers/bus/mhi/host/pci_generic.c | 43 ++++++++++++++++++++++++++++++
>>  1 file changed, 43 insertions(+)
>> 
>
>
>-- 
>With best wishes
>Dmitry
Slark Xiao June 28, 2024, 8:35 a.m. UTC | #3
At 2024-06-28 16:31:40, "Slark Xiao" <slark_xiao@163.com> wrote:
>
>At 2024-06-28 15:51:54, "Dmitry Baryshkov" <dmitry.baryshkov@linaro.org> wrote:
>>On Fri, Jun 28, 2024 at 03:36:05PM GMT, Slark Xiao wrote:
>>> Align with Qcom SDX72, add ready timeout item for Foxconn SDX72.
>>> And also, add firehose support since SDX72.
>>> 
>>> Signed-off-by: Slark Xiao <slark_xiao@163.com>
>>> ---
>>> v2: (1). Update the edl file path and name (2). Set SDX72 support
>>> trigger edl mode by default
>>> v3: Divide into 2 parts for Foxconn sdx72 platform
>>
>>Generic comment: please send all the patches using a single
>>git-send-email command. This way it will thread them properly, so that
>>they form a single patchseries in developers's mail clients. Or you can
>>just use 'b4' tool to manage and send the patchset.
>>
>
>Send again with command "git send-email v3-*.patch ...". Please take a view on that.
>Thanks.
>

Seems no difference in my side. Any difference in your side?

>>> ---
>>>  drivers/bus/mhi/host/pci_generic.c | 43 ++++++++++++++++++++++++++++++
>>>  1 file changed, 43 insertions(+)
>>> 
>>
>>
>>-- 
>>With best wishes
>>Dmitry
Dmitry Baryshkov June 28, 2024, 9:26 a.m. UTC | #4
On Fri, Jun 28, 2024 at 04:35:21PM GMT, Slark Xiao wrote:
> 
> At 2024-06-28 16:31:40, "Slark Xiao" <slark_xiao@163.com> wrote:
> >
> >At 2024-06-28 15:51:54, "Dmitry Baryshkov" <dmitry.baryshkov@linaro.org> wrote:
> >>On Fri, Jun 28, 2024 at 03:36:05PM GMT, Slark Xiao wrote:
> >>> Align with Qcom SDX72, add ready timeout item for Foxconn SDX72.
> >>> And also, add firehose support since SDX72.
> >>> 
> >>> Signed-off-by: Slark Xiao <slark_xiao@163.com>
> >>> ---
> >>> v2: (1). Update the edl file path and name (2). Set SDX72 support
> >>> trigger edl mode by default
> >>> v3: Divide into 2 parts for Foxconn sdx72 platform
> >>
> >>Generic comment: please send all the patches using a single
> >>git-send-email command. This way it will thread them properly, so that
> >>they form a single patchseries in developers's mail clients. Or you can
> >>just use 'b4' tool to manage and send the patchset.
> >>
> >
> >Send again with command "git send-email v3-*.patch ...". Please take a view on that.
> >Thanks.
> >
> 
> Seems no difference in my side. Any difference in your side?

Yes, the In-Reply-To headers have linked them together.

> 
> >>> ---
> >>>  drivers/bus/mhi/host/pci_generic.c | 43 ++++++++++++++++++++++++++++++
> >>>  1 file changed, 43 insertions(+)
> >>> 
> >>
> >>
> >>-- 
> >>With best wishes
> >>Dmitry
diff mbox series

Patch

diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
index 35ae7cd0711f..1fb1c2f2fe12 100644
--- a/drivers/bus/mhi/host/pci_generic.c
+++ b/drivers/bus/mhi/host/pci_generic.c
@@ -399,6 +399,8 @@  static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = {
 	MHI_CHANNEL_CONFIG_DL(13, "MBIM", 32, 0),
 	MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0),
 	MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0),
+	MHI_CHANNEL_CONFIG_UL_FP(34, "FIREHOSE", 32, 0),
+	MHI_CHANNEL_CONFIG_DL_FP(35, "FIREHOSE", 32, 0),
 	MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0_MBIM", 128, 2),
 	MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0_MBIM", 128, 3),
 };
@@ -419,6 +421,16 @@  static const struct mhi_controller_config modem_foxconn_sdx55_config = {
 	.event_cfg = mhi_foxconn_sdx55_events,
 };
 
+static const struct mhi_controller_config modem_foxconn_sdx72_config = {
+	.max_channels = 128,
+	.timeout_ms = 20000,
+	.ready_timeout_ms = 50000,
+	.num_channels = ARRAY_SIZE(mhi_foxconn_sdx55_channels),
+	.ch_cfg = mhi_foxconn_sdx55_channels,
+	.num_events = ARRAY_SIZE(mhi_foxconn_sdx55_events),
+	.event_cfg = mhi_foxconn_sdx55_events,
+};
+
 static const struct mhi_pci_dev_info mhi_foxconn_sdx55_info = {
 	.name = "foxconn-sdx55",
 	.fw = "qcom/sdx55m/sbl1.mbn",
@@ -488,6 +500,28 @@  static const struct mhi_pci_dev_info mhi_foxconn_dw5932e_info = {
 	.sideband_wake = false,
 };
 
+static const struct mhi_pci_dev_info mhi_foxconn_t99w515_info = {
+	.name = "foxconn-t99w515",
+	.edl = "fox/sdx72m/edl.mbn",
+	.edl_trigger = true,
+	.config = &modem_foxconn_sdx72_config,
+	.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
+	.dma_data_width = 32,
+	.mru_default = 32768,
+	.sideband_wake = false,
+};
+
+static const struct mhi_pci_dev_info mhi_foxconn_dw5934e_info = {
+	.name = "foxconn-dw5934e",
+	.edl = "fox/sdx72m/edl.mbn",
+	.edl_trigger = true,
+	.config = &modem_foxconn_sdx72_config,
+	.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
+	.dma_data_width = 32,
+	.mru_default = 32768,
+	.sideband_wake = false,
+};
+
 static const struct mhi_channel_config mhi_mv3x_channels[] = {
 	MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 64, 0),
 	MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 64, 0),
@@ -720,6 +754,15 @@  static const struct pci_device_id mhi_pci_id_table[] = {
 	/* DW5932e (sdx62), Non-eSIM */
 	{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0f9),
 		.driver_data = (kernel_ulong_t) &mhi_foxconn_dw5932e_info },
+	/* T99W515 (sdx72) */
+	{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe118),
+		.driver_data = (kernel_ulong_t) &mhi_foxconn_t99w515_info },
+	/* DW5934e(sdx72), With eSIM */
+	{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe11d),
+		.driver_data = (kernel_ulong_t) &mhi_foxconn_dw5934e_info },
+	/* DW5934e(sdx72), Non-eSIM */
+	{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe11e),
+		.driver_data = (kernel_ulong_t) &mhi_foxconn_dw5934e_info },
 	/* MV31-W (Cinterion) */
 	{ PCI_DEVICE(PCI_VENDOR_ID_THALES, 0x00b3),
 		.driver_data = (kernel_ulong_t) &mhi_mv31_info },