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Sat, 7 Sep 2024 03:19:33 -0500 Received: from xcbalucerop41x.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39 via Frontend Transport; Sat, 7 Sep 2024 03:19:32 -0500 From: To: , , , , , , , , CC: Alejandro Lucero Subject: [PATCH v3 08/20] cxl: add function for setting media ready by a driver Date: Sat, 7 Sep 2024 09:18:24 +0100 Message-ID: <20240907081836.5801-9-alejandro.lucero-palau@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240907081836.5801-1-alejandro.lucero-palau@amd.com> References: <20240907081836.5801-1-alejandro.lucero-palau@amd.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF00017099:EE_|SN7PR12MB7884:EE_ X-MS-Office365-Filtering-Correlation-Id: 7d3fbe87-0b8c-4737-9be4-08dccf15ce6e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|82310400026|1800799024; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Sep 2024 08:19:34.3292 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7d3fbe87-0b8c-4737-9be4-08dccf15ce6e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017099.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7884 X-Patchwork-Delegate: kuba@kernel.org From: Alejandro Lucero A Type-2 driver can require to set the memory availability explicitly. Add a function to the exported CXL API for accelerator drivers. Signed-off-by: Alejandro Lucero --- drivers/cxl/core/memdev.c | 6 ++++++ drivers/net/ethernet/sfc/efx_cxl.c | 5 +++++ include/linux/cxl/cxl.h | 1 + 3 files changed, 12 insertions(+) diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c index a7d8daf4a59b..836faf09b328 100644 --- a/drivers/cxl/core/memdev.c +++ b/drivers/cxl/core/memdev.c @@ -784,6 +784,12 @@ int cxl_release_resource(struct cxl_dev_state *cxlds, enum cxl_resource type) } EXPORT_SYMBOL_NS_GPL(cxl_release_resource, CXL); +void cxl_set_media_ready(struct cxl_dev_state *cxlds) +{ + cxlds->media_ready = true; +} +EXPORT_SYMBOL_NS_GPL(cxl_set_media_ready, CXL); + static int cxl_memdev_release_file(struct inode *inode, struct file *file) { struct cxl_memdev *cxlmd = diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c index 80259c8317fd..14fab41fe10a 100644 --- a/drivers/net/ethernet/sfc/efx_cxl.c +++ b/drivers/net/ethernet/sfc/efx_cxl.c @@ -78,6 +78,11 @@ int efx_cxl_init(struct efx_nic *efx) goto err; } + /* We do not have the register about media status. Hardware design + * implies it is ready. + */ + cxl_set_media_ready(cxl->cxlds); + return 0; err: kfree(cxl->cxlds); diff --git a/include/linux/cxl/cxl.h b/include/linux/cxl/cxl.h index 22912b2d9bb2..08723b2d75bc 100644 --- a/include/linux/cxl/cxl.h +++ b/include/linux/cxl/cxl.h @@ -54,4 +54,5 @@ bool cxl_pci_check_caps(struct cxl_dev_state *cxlds, u32 expected_caps, int cxl_pci_accel_setup_regs(struct pci_dev *pdev, struct cxl_dev_state *cxlds); int cxl_request_resource(struct cxl_dev_state *cxlds, enum cxl_resource type); int cxl_release_resource(struct cxl_dev_state *cxlds, enum cxl_resource type); +void cxl_set_media_ready(struct cxl_dev_state *cxlds); #endif