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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , , , Tariq Toukan Subject: [PATCH net-next V2 01/15] net/mlx5: Refactor QoS group scheduling element creation Date: Mon, 14 Oct 2024 23:52:46 +0300 Message-ID: <20241014205300.193519-2-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20241014205300.193519-1-tariqt@nvidia.com> References: <20241014205300.193519-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF00000017:EE_|BY5PR12MB4131:EE_ X-MS-Office365-Filtering-Correlation-Id: 601cedfb-c0d1-4eee-8766-08dcec925a7e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|376014|1800799024; X-Microsoft-Antispam-Message-Info: WnAtDlvOXGJ6YTSvauFBt1+mto9OZzpHsuW6kKnbfEA/ChKI3oyxF/yBqzXaej1/+7NqXLVZ1aSnqgobZ3dnGDkrPkN/qeinWHhnagWAC7aEjPPr1bZhIAF9jBdsr1KtMfwKq8WEvXvlmawJfIhx9q48JmODtVO9S3UQMfotPbsk3oTBD7oHZM8VKknUQc4zrMGcgCAvCILWYIw8LWaOS4pUg5ItjrANIbxws96uFu9ifI2km0p5esfT8VWfRlC+CXc69BbK1CeF4D4xB4agwONaumemcaGNY5DsU4GZOC490WfubFuPuUD8pFNZ91WdJ0ZFc6zxKtPgC38JmvtYJXITm2dXNZ/awLdEovHOghgmpgGn0gdE6CbQSpGu4VbQ4gg5Zs6v9JHUBb/KympO5TS0kf4IOgzaX3DNoC62JZxq/JKBB3yME/U0wdyVg++ac8K6LwCm3ZQWDeLlA8qXAaKDHy8j1pxIeSGLepJennNbsYJR5cqPwal2Y3FYmCmNySGKN4Roq6WptxuTKUiET5U2quEKTJmCE5uc80QDFvEQtbity/PUf7mmPtoyjDaphY7sBOYtdmcvOQZhZTBc6Ufilz7JRj3F1WetIx28mZbuX+x/17Gr7qtG32f1nlGVsy9ia2CK+5bWZD/Jo6T0mkgpkLHrGsTZcwhI7e8oxd1wldrUPBX28duuDJuqDN9oM96E7SM7iolMTNONoETZ4feG9Hqi+wy2cTCLrs7j5lqq7a+oj1ZPC11zdL6eVV79A9BX1s/Z1BL1ql0x7Zm2FJy/q2g3/qP/bpSWzrnNMrfeKJakQ/7EbfX2OHEgBcrqmS7JHTIu+dRAPdMG7wCa2A4AboCSULr73rea/pfkyv3Cydu1VqYROoH08lQrd7Go98IiYgTdB2B+qBtqGN0vdGQDxssWeUCR1eZ6hqJuTtKkscNx09erR7gC7ElXskCQ2XfvRauAulmbnqTW3QRsFzLmr4ecCviLjq5B3XF/nc+kHNbl41oSL9bzvz8Xe2zzz2lu5M9ASu9CDyFT+5/n68GPGVKJGrRRPIrY9nEZdINYLQaEZYngvgp1EWUWz/gEbsHDkGd1gtx3YlCtfUouLmkDToO+XP/s7prbDTGqmd27zO57d9xcZJ3p/ytihJaKK23muaptdQnrDYTpzHWyAdBgDkiNMaXkrDa0jyfAiCIyIjD7IkW2y0rrD+yA5rzz908wG8k+o4Ja625tlcJQ0W6cqKQpu5o8916Jk1i5mY2pySb5QIF2a2w9Bg/skifq+FTzB3h7sNNnRGakjRlR2KccH00OUnl8pAydkw5Lng+jd/RPvfSp07CETaRHzj6G3b0OqDF0U2R2lRRTariVo0n6ge9t0aywRevKHrWPvtnFK762EHCMTuuCXj3qehnO X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(36860700013)(376014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Oct 2024 20:54:10.5827 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 601cedfb-c0d1-4eee-8766-08dcec925a7e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF00000017.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4131 X-Patchwork-Delegate: kuba@kernel.org From: Carolina Jubran Introduce `esw_qos_create_group_sched_elem` to handle the creation of group scheduling elements for E-Switch QoS, Transmit Scheduling Arbiter (TSAR). This reduces duplication and simplifies code for TSAR setup. Signed-off-by: Carolina Jubran Reviewed-by: Cosmin Ratiu Signed-off-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/esw/qos.c | 64 +++++++++---------- 1 file changed, 31 insertions(+), 33 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c index ee6f76a6f0b5..7732f948e9c6 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c @@ -371,6 +371,33 @@ static int esw_qos_set_group_max_rate(struct mlx5_esw_rate_group *group, return err; } +static int esw_qos_create_group_sched_elem(struct mlx5_core_dev *dev, u32 parent_element_id, + u32 *tsar_ix) +{ + u32 tsar_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {}; + void *attr; + + if (!mlx5_qos_element_type_supported(dev, + SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR, + SCHEDULING_HIERARCHY_E_SWITCH) || + !mlx5_qos_tsar_type_supported(dev, + TSAR_ELEMENT_TSAR_TYPE_DWRR, + SCHEDULING_HIERARCHY_E_SWITCH)) + return -EOPNOTSUPP; + + MLX5_SET(scheduling_context, tsar_ctx, element_type, + SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR); + MLX5_SET(scheduling_context, tsar_ctx, parent_element_id, + parent_element_id); + attr = MLX5_ADDR_OF(scheduling_context, tsar_ctx, element_attributes); + MLX5_SET(tsar_element, attr, tsar_type, TSAR_ELEMENT_TSAR_TYPE_DWRR); + + return mlx5_create_scheduling_element_cmd(dev, + SCHEDULING_HIERARCHY_E_SWITCH, + tsar_ctx, + tsar_ix); +} + static int esw_qos_vport_create_sched_element(struct mlx5_vport *vport, u32 max_rate, u32 bw_share) { @@ -496,21 +523,11 @@ static void __esw_qos_free_rate_group(struct mlx5_esw_rate_group *group) static struct mlx5_esw_rate_group * __esw_qos_create_rate_group(struct mlx5_eswitch *esw, struct netlink_ext_ack *extack) { - u32 tsar_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {}; struct mlx5_esw_rate_group *group; - int tsar_ix, err; - void *attr; + u32 tsar_ix; + int err; - MLX5_SET(scheduling_context, tsar_ctx, element_type, - SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR); - MLX5_SET(scheduling_context, tsar_ctx, parent_element_id, - esw->qos.root_tsar_ix); - attr = MLX5_ADDR_OF(scheduling_context, tsar_ctx, element_attributes); - MLX5_SET(tsar_element, attr, tsar_type, TSAR_ELEMENT_TSAR_TYPE_DWRR); - err = mlx5_create_scheduling_element_cmd(esw->dev, - SCHEDULING_HIERARCHY_E_SWITCH, - tsar_ctx, - &tsar_ix); + err = esw_qos_create_group_sched_elem(esw->dev, esw->qos.root_tsar_ix, &tsar_ix); if (err) { NL_SET_ERR_MSG_MOD(extack, "E-Switch create TSAR for group failed"); return ERR_PTR(err); @@ -591,32 +608,13 @@ static int __esw_qos_destroy_rate_group(struct mlx5_esw_rate_group *group, static int esw_qos_create(struct mlx5_eswitch *esw, struct netlink_ext_ack *extack) { - u32 tsar_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {}; struct mlx5_core_dev *dev = esw->dev; - void *attr; int err; if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling)) return -EOPNOTSUPP; - if (!mlx5_qos_element_type_supported(dev, - SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR, - SCHEDULING_HIERARCHY_E_SWITCH) || - !mlx5_qos_tsar_type_supported(dev, - TSAR_ELEMENT_TSAR_TYPE_DWRR, - SCHEDULING_HIERARCHY_E_SWITCH)) - return -EOPNOTSUPP; - - MLX5_SET(scheduling_context, tsar_ctx, element_type, - SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR); - - attr = MLX5_ADDR_OF(scheduling_context, tsar_ctx, element_attributes); - MLX5_SET(tsar_element, attr, tsar_type, TSAR_ELEMENT_TSAR_TYPE_DWRR); - - err = mlx5_create_scheduling_element_cmd(dev, - SCHEDULING_HIERARCHY_E_SWITCH, - tsar_ctx, - &esw->qos.root_tsar_ix); + err = esw_qos_create_group_sched_elem(esw->dev, 0, &esw->qos.root_tsar_ix); if (err) { esw_warn(dev, "E-Switch create root TSAR failed (%d)\n", err); return err;