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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Shay Drory , Moshe Shemesh , Tariq Toukan Subject: [PATCH net 6/8] net/mlx5: Fix command bitmask initialization Date: Tue, 15 Oct 2024 12:32:06 +0300 Message-ID: <20241015093208.197603-7-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20241015093208.197603-1-tariqt@nvidia.com> References: <20241015093208.197603-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F3:EE_|CH2PR12MB4165:EE_ X-MS-Office365-Filtering-Correlation-Id: d395e572-58e1-4237-98c8-08dcecfc69df X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: 0yCXKTckXaBoN7CY8L5lbxDPz7BtDEp/+UO4nQhj9kN7Gaz9ash+ifN3AdF6OMS/Rg9Zh3OPfZI34BeUOjHJD5npzngGSsT9o+QTxQJPJTVBQyLcqDBj5nJzR8Xj1hzWrEz5vmgPmUhPSF/eq3hHEXveCKI3wFJ67m8eNm67gGMRknCfh0sBzrPZh1Viaq4845xJC3Ff45U8pCe2oWnZJQ5uqfki/EZQQfOB3OZX3iryDcQKH8yA6+WxzNmrvuoFkfBQsMna1apMpk3RtNf3dUGARjrvJ4CbeW/kGmrtkmO/AHvYrh7/3QOdJxJfaGCBs8mpJsprAYWL8Zh+frT82l3GzZcZf2pbIsoJMDrbFN4cOcmDoDlJGg8V6sr5ckBktui1FYSFNrYVfZw1Bre6kao1bpcXHQTROl7mR7+VFv7v1hpSyXxbQan07fqx8zvZ9uqYxxiEa5bqZWAwRzobSxV08vPdDJ42+uxfRboytVfeM3Y+UU45wAy6QLYMzpjKpdBhEmyBRRxQhG8z2PeVFj1783i4Gj1kROVM/WEDmiB7iWqcI7apcgxO2U5t2RcgtLO4D2k7Qx/oXL6Nm1NoDjO+v0MxjuEvbXH6uf+C2y4qDSaHhQskqaQUYdQZPRu8hzjHqIrtSVyjPPl/6uDIzoZef6UT+sI9nJDVZoIMxwE3Pmaeq19QnBkM/IhaNUxwmiIXF45Upul8E5f+vhp1D/wlkYdm0qTj+wuxvMFzjKWPnYZ+TXUQTtECd1d/xn4VILzdN2i7xgDe/tSJDPowp2BIKy0MvkQG5RF48clzbd1q95ubptgUD4W9HJkClZKeI8PYm2aAZPkwh6XM0sgQn2ZwU96hahD07o/dPb/vRmxfMGbN3y9XEzyJ/X/c7DBzu/kx55XONbptpAO1kdQGsFBKSY6mO98+qvToeR6ia7X8eiBGE0Jxlk9ZrsiNcv5idNzrM4enhN6s3pOoW9rXXjj6QJnSk8a+QjNIpNkDeaMBa+SHnbsJcFDyO7foVQvMvd6/kwXgy1nbRyo1DuNHigpKS4gx6d+vasL4JgUFqFRjaWeYx4xtZkqW7EyybMVNA+EE8AZrc8wcfUxp2cq9WpG+86sOTUgWOLfjS8RPcMm1Zf5/meiAk+SK2qDc6VpZRFcwYdh/sN+xpVSoKi4b+JmrTM1yLx0Fu6ZBOxLRDVB5/tvPKkumX/x1/JkQ3JknO4ZY0WCHeibioUuu7SUNKSgNa/1p07+0ZZghTLddonPojNC0km4eRIER3FmS6Rbhv1DsK/eQMwHVryZY3dBSsGED2cr9xTGX6pEtrgWsXOjW+XAiQecRaMzJWgIxMeZ4QN+0aNq/zIH9oi2QSzgZoCDeMkRHDAQznUePo/nEJecCKQkO32QdlOWx34D+txwm X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Oct 2024 09:33:23.0536 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d395e572-58e1-4237-98c8-08dcecfc69df X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F3.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4165 X-Patchwork-Delegate: kuba@kernel.org From: Shay Drory Command bitmask have a dedicated bit for MANAGE_PAGES command, this bit isn't Initialize during command bitmask Initialization, only during MANAGE_PAGES. In addition, mlx5_cmd_trigger_completions() is trying to trigger completion for MANAGE_PAGES command as well. Hence, in case health error occurred before any MANAGE_PAGES command have been invoke (for example, during mlx5_enable_hca()), mlx5_cmd_trigger_completions() will try to trigger completion for MANAGE_PAGES command, which will result in null-ptr-deref error.[1] Fix it by Initialize command bitmask correctly. While at it, re-write the code for better understanding. [1] BUG: KASAN: null-ptr-deref in mlx5_cmd_trigger_completions+0x1db/0x600 [mlx5_core] Write of size 4 at addr 0000000000000214 by task kworker/u96:2/12078 CPU: 10 PID: 12078 Comm: kworker/u96:2 Not tainted 6.9.0-rc2_for_upstream_debug_2024_04_07_19_01 #1 Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS rel-1.13.0-0-gf21b5a4aeb02-prebuilt.qemu.org 04/01/2014 Workqueue: mlx5_health0000:08:00.0 mlx5_fw_fatal_reporter_err_work [mlx5_core] Call Trace: dump_stack_lvl+0x7e/0xc0 kasan_report+0xb9/0xf0 kasan_check_range+0xec/0x190 mlx5_cmd_trigger_completions+0x1db/0x600 [mlx5_core] mlx5_cmd_flush+0x94/0x240 [mlx5_core] enter_error_state+0x6c/0xd0 [mlx5_core] mlx5_fw_fatal_reporter_err_work+0xf3/0x480 [mlx5_core] process_one_work+0x787/0x1490 ? lockdep_hardirqs_on_prepare+0x400/0x400 ? pwq_dec_nr_in_flight+0xda0/0xda0 ? assign_work+0x168/0x240 worker_thread+0x586/0xd30 ? rescuer_thread+0xae0/0xae0 kthread+0x2df/0x3b0 ? kthread_complete_and_exit+0x20/0x20 ret_from_fork+0x2d/0x70 ? kthread_complete_and_exit+0x20/0x20 ret_from_fork_asm+0x11/0x20 Fixes: 9b98d395b85d ("net/mlx5: Start health poll at earlier stage of driver load") Signed-off-by: Shay Drory Reviewed-by: Moshe Shemesh Reviewed-by: Saeed Mahameed Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/cmd.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c index a64d96effb9e..6bd8a18e3af3 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c @@ -1765,6 +1765,10 @@ static void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, u64 vec, bool force } } +#define MLX5_MAX_MANAGE_PAGES_CMD_ENT 1 +#define MLX5_CMD_MASK ((1UL << (cmd->vars.max_reg_cmds + \ + MLX5_MAX_MANAGE_PAGES_CMD_ENT)) - 1) + static void mlx5_cmd_trigger_completions(struct mlx5_core_dev *dev) { struct mlx5_cmd *cmd = &dev->cmd; @@ -1776,7 +1780,7 @@ static void mlx5_cmd_trigger_completions(struct mlx5_core_dev *dev) /* wait for pending handlers to complete */ mlx5_eq_synchronize_cmd_irq(dev); spin_lock_irqsave(&dev->cmd.alloc_lock, flags); - vector = ~dev->cmd.vars.bitmask & ((1ul << (1 << dev->cmd.vars.log_sz)) - 1); + vector = ~dev->cmd.vars.bitmask & MLX5_CMD_MASK; if (!vector) goto no_trig; @@ -2361,7 +2365,7 @@ int mlx5_cmd_enable(struct mlx5_core_dev *dev) cmd->state = MLX5_CMDIF_STATE_DOWN; cmd->vars.max_reg_cmds = (1 << cmd->vars.log_sz) - 1; - cmd->vars.bitmask = (1UL << cmd->vars.max_reg_cmds) - 1; + cmd->vars.bitmask = MLX5_CMD_MASK; sema_init(&cmd->vars.sem, cmd->vars.max_reg_cmds); sema_init(&cmd->vars.pages_sem, 1);