From patchwork Tue Oct 22 11:41:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mateusz Polchlopek X-Patchwork-Id: 13845131 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB86A1474AF for ; Tue, 22 Oct 2024 05:41:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729575684; cv=none; b=BadG8cRp24N68577Ycz8BxU43/IczeUwRoYqcaknapU8MptGRCC4HK3nuezzCQrZLSGjw2+bs6Z2dJCEJU31lMHZ/M5LNZgoVYnARAe+wwBTw3y9nlbwgv23ooFbl2pej6HVMvvhqehNtsoH+lvcJTWCzVu83ouZy8MYcOBAHsA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729575684; c=relaxed/simple; bh=mUtEqk4U8zkz5yokOdmRyXUvZbJZR3CNr/KR9ocWfgY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=qtAQxo5D7zWUIIdGRjcImjcZkitC5mlWiPuJuex+3XdycLclEVHuwapwIbPRYf3X4tT35ZjnWlDSzG+BfQnfmA65TvTnJ1u8HR4RqbmcCNQV4iYwqtv3q4uD3NdXUj1qNIFtNlIhd84O46VTAwS5KDSdBGSbuY54Gy0Bm+X7m08= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=gcsz83Dj; arc=none smtp.client-ip=192.198.163.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="gcsz83Dj" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729575683; x=1761111683; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mUtEqk4U8zkz5yokOdmRyXUvZbJZR3CNr/KR9ocWfgY=; b=gcsz83Dj8f48RqZMsUZYmGwXyRN3X9vBk8s9u/2p83hi9gQtA/0QJk62 4o4hjYHwBsBANurGPmGz2C6JwI7VFMiWDCAB9hn1/nDSb/hS4BNtY45Sw 7laz9ME58SA2wXC5LMDiwCL8SQQI7j162sWu2DPKHTBW3hZEZRXaH1XYj 8H1gHmVF+2eu+7vMHsY3vlYHT3BUCFSoWiF2Ccfk4sBaGsCx/6/6VF73C Jdh8cZ9wblAkgegHoz9CotciQDhBF8vBycNeXqwuECnvsgW6rBA9XJ67m HWDs8jHppjUjuNUHZXz8l6+T7oTa5gAnLsyF8dxohvsY2Fmx8ehYY9aAn A==; X-CSE-ConnectionGUID: V24nzMJHTyCKDFsDz0dJNA== X-CSE-MsgGUID: nXeRnUbkRJ6XZIJ/GPnAvw== X-IronPort-AV: E=McAfee;i="6700,10204,11232"; a="33015640" X-IronPort-AV: E=Sophos;i="6.11,222,1725346800"; d="scan'208";a="33015640" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2024 22:41:22 -0700 X-CSE-ConnectionGUID: Mo+Pz6gOR++P7AEl7WKaKA== X-CSE-MsgGUID: byL6XBNKSVupSu5vmljp6g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="84558132" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by orviesa003.jf.intel.com with ESMTP; 21 Oct 2024 22:41:18 -0700 Received: from fedora.igk.intel.com (Metan_eth.igk.intel.com [10.123.220.124]) by irvmail002.ir.intel.com (Postfix) with ESMTP id 5F39127BCC; Tue, 22 Oct 2024 06:41:17 +0100 (IST) From: Mateusz Polchlopek To: intel-wired-lan@lists.osuosl.org Cc: netdev@vger.kernel.org, Jacob Keller , Wojciech Drewek , Rahul Rameshbabu , Sunil Goutham , Simon Horman , Mateusz Polchlopek Subject: [Intel-wired-lan] [PATCH iwl-next v12 14/14] iavf: add support for Rx timestamps to hotpath Date: Tue, 22 Oct 2024 07:41:21 -0400 Message-Id: <20241022114121.61284-15-mateusz.polchlopek@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20241022114121.61284-1-mateusz.polchlopek@intel.com> References: <20241022114121.61284-1-mateusz.polchlopek@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: Jacob Keller Add support for receive timestamps to the Rx hotpath. This support only works when using the flexible descriptor format, so make sure that we request this format by default if we have receive timestamp support available in the PTP capabilities. In order to report the timestamps to userspace, we need to perform timestamp extension. The Rx descriptor does actually contain the "40 bit" timestamp. However, upper 32 bits which contain nanoseconds are conveniently stored separately in the descriptor. We could extract the 32bits and lower 8 bits, then perform a bitwise OR to calculate the 40bit value. This makes no sense, because the timestamp extension algorithm would simply discard the lower 8 bits anyways. Thus, implement timestamp extension as iavf_ptp_extend_32b_timestamp(), and extract and forward only the 32bits of nominal nanoseconds. Signed-off-by: Jacob Keller Reviewed-by: Wojciech Drewek Reviewed-by: Rahul Rameshbabu Reviewed-by: Sunil Goutham Reviewed-by: Simon Horman Signed-off-by: Mateusz Polchlopek Tested-by: Rafal Romanowski --- drivers/net/ethernet/intel/iavf/iavf_main.c | 9 +++ drivers/net/ethernet/intel/iavf/iavf_ptp.c | 61 +++++++++++++++++++++ drivers/net/ethernet/intel/iavf/iavf_ptp.h | 11 ++++ drivers/net/ethernet/intel/iavf/iavf_txrx.c | 43 +++++++++++++++ drivers/net/ethernet/intel/iavf/iavf_type.h | 1 + 5 files changed, 125 insertions(+) diff --git a/drivers/net/ethernet/intel/iavf/iavf_main.c b/drivers/net/ethernet/intel/iavf/iavf_main.c index 1103c210b4e3..a25ceecf1ea7 100644 --- a/drivers/net/ethernet/intel/iavf/iavf_main.c +++ b/drivers/net/ethernet/intel/iavf/iavf_main.c @@ -730,6 +730,15 @@ static u8 iavf_select_rx_desc_format(const struct iavf_adapter *adapter) if (!IAVF_RXDID_ALLOWED(adapter)) return VIRTCHNL_RXDID_1_32B_BASE; + /* Rx timestamping requires the use of flexible NIC descriptors */ + if (iavf_ptp_cap_supported(adapter, VIRTCHNL_1588_PTP_CAP_RX_TSTAMP)) { + if (rxdids & BIT(VIRTCHNL_RXDID_2_FLEX_SQ_NIC)) + return VIRTCHNL_RXDID_2_FLEX_SQ_NIC; + + pci_warn(adapter->pdev, + "Unable to negotiate flexible descriptor format\n"); + } + /* Warn if the PF does not list support for the default legacy * descriptor format. This shouldn't happen, as this is the format * used if VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC is not supported. It is diff --git a/drivers/net/ethernet/intel/iavf/iavf_ptp.c b/drivers/net/ethernet/intel/iavf/iavf_ptp.c index 4246ddfa6f0d..b4d5eda2e84f 100644 --- a/drivers/net/ethernet/intel/iavf/iavf_ptp.c +++ b/drivers/net/ethernet/intel/iavf/iavf_ptp.c @@ -394,6 +394,9 @@ void iavf_ptp_release(struct iavf_adapter *adapter) } adapter->aq_required &= ~IAVF_FLAG_AQ_SEND_PTP_CMD; mutex_unlock(&adapter->ptp.aq_cmd_lock); + + adapter->ptp.hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; + iavf_ptp_disable_rx_tstamp(adapter); } /** @@ -422,3 +425,61 @@ void iavf_ptp_process_caps(struct iavf_adapter *adapter) iavf_ptp_disable_rx_tstamp(adapter); } } + +/** + * iavf_ptp_extend_32b_timestamp - Convert a 32b nanoseconds timestamp to 64b + * nanoseconds + * @cached_phc_time: recently cached copy of PHC time + * @in_tstamp: Ingress/egress 32b nanoseconds timestamp value + * + * Hardware captures timestamps which contain only 32 bits of nominal + * nanoseconds, as opposed to the 64bit timestamps that the stack expects. + * + * Extend the 32bit nanosecond timestamp using the following algorithm and + * assumptions: + * + * 1) have a recently cached copy of the PHC time + * 2) assume that the in_tstamp was captured 2^31 nanoseconds (~2.1 + * seconds) before or after the PHC time was captured. + * 3) calculate the delta between the cached time and the timestamp + * 4) if the delta is smaller than 2^31 nanoseconds, then the timestamp was + * captured after the PHC time. In this case, the full timestamp is just + * the cached PHC time plus the delta. + * 5) otherwise, if the delta is larger than 2^31 nanoseconds, then the + * timestamp was captured *before* the PHC time, i.e. because the PHC + * cache was updated after the timestamp was captured by hardware. In this + * case, the full timestamp is the cached time minus the inverse delta. + * + * This algorithm works even if the PHC time was updated after a Tx timestamp + * was requested, but before the Tx timestamp event was reported from + * hardware. + * + * This calculation primarily relies on keeping the cached PHC time up to + * date. If the timestamp was captured more than 2^31 nanoseconds after the + * PHC time, it is possible that the lower 32bits of PHC time have + * overflowed more than once, and we might generate an incorrect timestamp. + * + * This is prevented by (a) periodically updating the cached PHC time once + * a second, and (b) discarding any Tx timestamp packet if it has waited for + * a timestamp for more than one second. + * + * Return: extended timestamp (to 64b). + */ +u64 iavf_ptp_extend_32b_timestamp(u64 cached_phc_time, u32 in_tstamp) +{ + u32 low = lower_32_bits(cached_phc_time); + u32 delta = in_tstamp - low; + u64 ns; + + /* Do not assume that the in_tstamp is always more recent than the + * cached PHC time. If the delta is large, it indicates that the + * in_tstamp was taken in the past, and should be converted + * forward. + */ + if (delta > S32_MAX) + ns = cached_phc_time - (low - in_tstamp); + else + ns = cached_phc_time + delta; + + return ns; +} diff --git a/drivers/net/ethernet/intel/iavf/iavf_ptp.h b/drivers/net/ethernet/intel/iavf/iavf_ptp.h index 0801e3ff5a59..783b8f287cd9 100644 --- a/drivers/net/ethernet/intel/iavf/iavf_ptp.h +++ b/drivers/net/ethernet/intel/iavf/iavf_ptp.h @@ -6,6 +6,9 @@ #include "iavf_types.h" +/* bit indicating whether a 40bit timestamp is valid */ +#define IAVF_PTP_40B_TSTAMP_VALID BIT(24) + #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) void iavf_ptp_init(struct iavf_adapter *adapter); void iavf_ptp_release(struct iavf_adapter *adapter); @@ -15,6 +18,7 @@ void iavf_virtchnl_send_ptp_cmd(struct iavf_adapter *adapter); int iavf_ptp_set_ts_config(struct iavf_adapter *adapter, struct kernel_hwtstamp_config *config, struct netlink_ext_ack *extack); +u64 iavf_ptp_extend_32b_timestamp(u64 cached_phc_time, u32 in_tstamp); #else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ static inline void iavf_ptp_init(struct iavf_adapter *adapter) { } static inline void iavf_ptp_release(struct iavf_adapter *adapter) { } @@ -32,5 +36,12 @@ static inline int iavf_ptp_set_ts_config(struct iavf_adapter *adapter, { return -1; } + +static inline u64 iavf_ptp_extend_32b_timestamp(u64 cached_phc_time, + u32 in_tstamp) +{ + return 0; +} + #endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ #endif /* _IAVF_PTP_H_ */ diff --git a/drivers/net/ethernet/intel/iavf/iavf_txrx.c b/drivers/net/ethernet/intel/iavf/iavf_txrx.c index 283997b8a777..422312b8b54a 100644 --- a/drivers/net/ethernet/intel/iavf/iavf_txrx.c +++ b/drivers/net/ethernet/intel/iavf/iavf_txrx.c @@ -8,6 +8,7 @@ #include "iavf.h" #include "iavf_trace.h" #include "iavf_prototype.h" +#include "iavf_ptp.h" /** * iavf_is_descriptor_done - tests DD bit in Rx descriptor @@ -1076,6 +1077,45 @@ static void iavf_flex_rx_hash(const struct iavf_ring *ring, __le64 qw1, } } +/** + * iavf_flex_rx_tstamp - Capture Rx timestamp from the descriptor + * @rx_ring: descriptor ring + * @qw2: quad word 2 of descriptor + * @qw3: quad word 3 of descriptor + * @skb: skb currently being received + * + * Read the Rx timestamp value from the descriptor and pass it to the stack. + * + * This function only operates on the VIRTCHNL_RXDID_2_FLEX_SQ_NIC flexible + * descriptor writeback format. + */ +static void iavf_flex_rx_tstamp(const struct iavf_ring *rx_ring, __le64 qw2, + __le64 qw3, struct sk_buff *skb) +{ + u32 tstamp; + u64 ns; + + /* Skip processing if timestamps aren't enabled */ + if (!(rx_ring->flags & IAVF_TXRX_FLAGS_HW_TSTAMP)) + return; + + /* Check if this Rx descriptor has a valid timestamp */ + if (!le64_get_bits(qw2, IAVF_PTP_40B_TSTAMP_VALID)) + return; + + /* the ts_low field only contains the valid bit and sub-nanosecond + * precision, so we don't need to extract it. + */ + tstamp = le64_get_bits(qw3, IAVF_RXD_FLEX_QW3_TSTAMP_HIGH_M); + + ns = iavf_ptp_extend_32b_timestamp(rx_ring->ptp->cached_phc_time, + tstamp); + + *skb_hwtstamps(skb) = (struct skb_shared_hwtstamps) { + .hwtstamp = ns_to_ktime(ns), + }; +} + /** * iavf_process_skb_fields - Populate skb header fields from Rx descriptor * @rx_ring: rx descriptor ring packet is being transacted on @@ -1097,11 +1137,14 @@ static void iavf_process_skb_fields(const struct iavf_ring *rx_ring, struct libeth_rx_pt decoded_pt; __le64 qw0 = rx_desc->qw0; __le64 qw1 = rx_desc->qw1; + __le64 qw2 = rx_desc->qw2; + __le64 qw3 = rx_desc->qw3; decoded_pt = libie_rx_pt_parse(ptype); if (flex) { iavf_flex_rx_hash(rx_ring, qw1, skb, decoded_pt); + iavf_flex_rx_tstamp(rx_ring, qw2, qw3, skb); csum_bits = iavf_flex_rx_csum(rx_ring->vsi, le64_to_cpu(qw1), decoded_pt); } else { diff --git a/drivers/net/ethernet/intel/iavf/iavf_type.h b/drivers/net/ethernet/intel/iavf/iavf_type.h index e62a8a0067ea..f9e1319620f4 100644 --- a/drivers/net/ethernet/intel/iavf/iavf_type.h +++ b/drivers/net/ethernet/intel/iavf/iavf_type.h @@ -285,6 +285,7 @@ struct iavf_rx_desc { /* L2 Tag 2 Presence */ #define IAVF_RXD_FLEX_L2TAG2P_M BIT(11) aligned_le64 qw3; +#define IAVF_RXD_FLEX_QW3_TSTAMP_HIGH_M GENMASK_ULL(63, 32) } __aligned(4 * sizeof(__le64)); static_assert(sizeof(struct iavf_rx_desc) == 32);