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Mon, 02 Dec 2024 19:46:41 -0800 (PST) From: Zhiyuan Wan To: andrew@lunn.ch Cc: kuba@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, willy.liu@realtek.com, Zhiyuan Wan , Yuki Lee Subject: [PATCH v2 1/2] net: phy: realtek: disable broadcast address feature of rtl8211f Date: Tue, 3 Dec 2024 11:46:35 +0800 Message-Id: <20241203034635.2060272-1-kmlinuxm@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org This feature is enabled defaultly after a reset of this transceiver. When this feature is enabled, the phy not only responds to the configuration PHY address by pin states on board, but also responds to address 0, the optional broadcast address of the MDIO bus. But some MDIO device like mt7530 switch chip (integrated in mt7621 SoC), also use address 0 to configure a specific port, when use mt7530 and rtl8211f together, it usually causes address conflict, leads to the port of RTL8211FS stops working. This patch disables broadcast address feature of rtl8211f when phy_addr is not 0. Solved address conflict with other devices on MDIO bus. Reviewed-by: Yuki Lee Signed-off-by: Zhiyuan Wan --- drivers/net/phy/realtek.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index f65d7f1f3..9824718af 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -31,6 +31,7 @@ #define RTL8211F_PHYCR1 0x18 #define RTL8211F_PHYCR2 0x19 #define RTL8211F_INSR 0x1d +#define RTL8211F_PHYAD0_EN BIT(13) #define RTL8211F_LEDCR 0x10 #define RTL8211F_LEDCR_MODE BIT(15) @@ -377,12 +378,18 @@ static int rtl8211f_config_init(struct phy_device *phydev) struct device *dev = &phydev->mdio.dev; u16 val_txdly, val_rxdly; int ret; + u16 phyad0_disable = 0; + if (phydev->mdio.addr != 0) { + phyad0_disable = RTL8211F_PHYAD0_EN; + dev_dbg(dev, "disabling MDIO address 0 for this phy"); + } ret = phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1, - RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF, + RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | + RTL8211F_ALDPS_XTAL_OFF | phyad0_disable, priv->phycr1); if (ret < 0) { - dev_err(dev, "aldps mode configuration failed: %pe\n", + dev_err(dev, "mode configuration failed: %pe\n", ERR_PTR(ret)); return ret; }