| Message ID | 20250205-v6-12-topic-socfpga-agilex5-v4-2-ebf070e2075f@pengutronix.de (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | ARM64: dts: intel: agilex5: add nodes and new board | expand |
| Context | Check | Description |
|---|---|---|
| netdev/tree_selection | success | Not a local patch |
On Wed, 05 Feb 2025 16:32:23 +0100, Steffen Trumtrar wrote: > Changes to the binding while converting: > - add "snps,dwmac-3.7{0,2,4}a". They are used, but undocumented. > - altr,f2h_ptp_ref_clk is not a required property but optional. > > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> > --- > .../bindings/net/pcs/altr,gmii-to-sgmii.yaml | 47 ++++++++++ > .../devicetree/bindings/net/socfpga-dwmac.txt | 57 ------------ > .../devicetree/bindings/net/socfpga-dwmac.yaml | 102 +++++++++++++++++++++ > 3 files changed, 149 insertions(+), 57 deletions(-) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/pcs/altr,gmii-to-sgmii.example.dtb: phy@100000240: reg: [[1, 576], [8, 1], [512, 64]] is too short from schema $id: http://devicetree.org/schemas/pcs/altr,gmii-to-sgmii.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/pcs/altr,gmii-to-sgmii.example.dtb: phy@100000240: 'clock-names', 'clocks' do not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/pcs/altr,gmii-to-sgmii.yaml# doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250205-v6-12-topic-socfpga-agilex5-v4-2-ebf070e2075f@pengutronix.de The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
Hi, On 2025-02-05 at 10:49 -06, "Rob Herring (Arm)" <robh@kernel.org> wrote: > On Wed, 05 Feb 2025 16:32:23 +0100, Steffen Trumtrar wrote: > > Changes to the binding while converting: > > - add "snps,dwmac-3.7{0,2,4}a". They are used, but undocumented. > > - altr,f2h_ptp_ref_clk is not a required property but optional. > > > > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> > > --- > > .../bindings/net/pcs/altr,gmii-to-sgmii.yaml | 47 ++++++++++ > > .../devicetree/bindings/net/socfpga-dwmac.txt | 57 ------------ > > .../devicetree/bindings/net/socfpga-dwmac.yaml | 102 +++++++++++++++++++++ > > 3 files changed, 149 insertions(+), 57 deletions(-) > > > > My bot found errors running 'make dt_binding_check' on your patch: > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/pcs/altr,gmii-to-sgmii.example.dtb: > phy@100000240: reg: [[1, 576], [8, 1], [512, 64]] is too short > from schema $id: http://devicetree.org/schemas/pcs/altr,gmii-to-sgmii.yaml# > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/pcs/altr,gmii-to-sgmii.example.dtb: > phy@100000240: 'clock-names', 'clocks' do not match any of the regexes: > 'pinctrl-[0-9]+' > from schema $id: http://devicetree.org/schemas/pcs/altr,gmii-to-sgmii.yaml# > > doc reference errors (make refcheckdocs): > > See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250205-v6-12-topic-socfpga-agilex5-v4-2-ebf070e2075f@pengutronix.de > > The base for the series is generally the latest rc1. A different dependency > should be noted in *this* patch. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit after running the above command yourself. Note > that DT_SCHEMA_FILES can be set to your schema file to speed up checking > your schema. However, it must be unset to test all examples with your schema. 'pipx upgrade dtschema' says I have version 2025.2, but I still don't get theses errors. make O=build dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/net/pcs/altr,gmii-to-sgmii.yaml make[1]: Entering directory '(...)' CHKDT (...)/Documentation/devicetree/bindings LINT (...)/Documentation/devicetree/bindings DTC [C] Documentation/devicetree/bindings/net/pcs/altr,gmii-to-sgmii.example.dtb Anything I'm missing or doing wrong? Best regards, Steffen -- Pengutronix e.K. | Dipl.-Inform. Steffen Trumtrar | Steuerwalder Str. 21 | https://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686| Fax: +49-5121-206917-5555 |
On Thu, Feb 06, 2025 at 02:19:33PM +0100, Steffen Trumtrar wrote: > > Hi, > > On 2025-02-05 at 10:49 -06, "Rob Herring (Arm)" <robh@kernel.org> wrote: > > > On Wed, 05 Feb 2025 16:32:23 +0100, Steffen Trumtrar wrote: > > > Changes to the binding while converting: > > > - add "snps,dwmac-3.7{0,2,4}a". They are used, but undocumented. > > > - altr,f2h_ptp_ref_clk is not a required property but optional. > > > > > > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> > > > --- > > > .../bindings/net/pcs/altr,gmii-to-sgmii.yaml | 47 ++++++++++ > > > .../devicetree/bindings/net/socfpga-dwmac.txt | 57 ------------ > > > .../devicetree/bindings/net/socfpga-dwmac.yaml | 102 +++++++++++++++++++++ > > > 3 files changed, 149 insertions(+), 57 deletions(-) > > > > > > > My bot found errors running 'make dt_binding_check' on your patch: > > > > yamllint warnings/errors: > > > > dtschema/dtc warnings/errors: > > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/pcs/altr,gmii-to-sgmii.example.dtb: > > phy@100000240: reg: [[1, 576], [8, 1], [512, 64]] is too short > > from schema $id: http://devicetree.org/schemas/pcs/altr,gmii-to-sgmii.yaml# > > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/pcs/altr,gmii-to-sgmii.example.dtb: > > phy@100000240: 'clock-names', 'clocks' do not match any of the regexes: > > 'pinctrl-[0-9]+' > > from schema $id: http://devicetree.org/schemas/pcs/altr,gmii-to-sgmii.yaml# > > > > doc reference errors (make refcheckdocs): > > > > See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250205-v6-12-topic-socfpga-agilex5-v4-2-ebf070e2075f@pengutronix.de > > > > The base for the series is generally the latest rc1. A different dependency > > should be noted in *this* patch. > > > > If you already ran 'make dt_binding_check' and didn't see the above > > error(s), then make sure 'yamllint' is installed and dt-schema is up to > > date: > > > > pip3 install dtschema --upgrade > > > > Please check and re-submit after running the above command yourself. Note > > that DT_SCHEMA_FILES can be set to your schema file to speed up checking > > your schema. However, it must be unset to test all examples with your schema. > > 'pipx upgrade dtschema' says I have version 2025.2, but I still don't get theses errors. > > make O=build dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/net/pcs/altr,gmii-to-sgmii.yaml > make[1]: Entering directory '(...)' > CHKDT (...)/Documentation/devicetree/bindings > LINT (...)/Documentation/devicetree/bindings > DTC [C] Documentation/devicetree/bindings/net/pcs/altr,gmii-to-sgmii.example.dtb > > Anything I'm missing or doing wrong? Try: make O=build dt_binding_check DT_SCHEMA_FILES=net/pcs/altr,gmii-to-sgmii.yaml The full path should work, but seems there is some issue. But really, DT_SCHEMA_FILES is just a sub-string to match with schema $id. 'reg' should be the number of logical entries (and what they are), not the number of cells. Rob
diff --git a/Documentation/devicetree/bindings/net/pcs/altr,gmii-to-sgmii.yaml b/Documentation/devicetree/bindings/net/pcs/altr,gmii-to-sgmii.yaml new file mode 100644 index 0000000000000000000000000000000000000000..1b7b69b2e396a508dfbb2c56399302b1cd1ce658 --- /dev/null +++ b/Documentation/devicetree/bindings/net/pcs/altr,gmii-to-sgmii.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pcs/altr,gmii-to-sgmii.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Altera SOCFPGA Triple Speed Ethernet GMII-to-SGMII converter + +maintainers: + - Dinh Nguyen <dinguyen@altera.com> + +description: + The Altera Triple Speed Ethernet controller provides a SGMII PCS and some clocks + to the ethernet subsystem to which it is attached. + +properties: + compatible: + const: altr,gmii-to-sgmii-2.0 + + reg: + maxItems: 6 + + reg-names: + const: eth_tse_control_port + + clocks-names: + items: + - const: tse_pcs_ref_clk_clock_connection + - const: tse_rx_cdr_refclk + +required: + - compatible + - reg + - reg-names + +additionalProperties: false + +examples: + - | + gmii_to_sgmii_converter: phy@100000240 { + compatible = "altr,gmii-to-sgmii-2.0"; + reg = <0x00000001 0x00000240 0x00000008>, + <0x00000001 0x00000200 0x00000040>; + reg-names = "eth_tse_control_port"; + clocks = <&sgmii_1_clk_0 &emac1 1 &sgmii_clk_125 &sgmii_clk_125>; + clock-names = "tse_pcs_ref_clk_clock_connection", "tse_rx_cdr_refclk"; + }; diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt deleted file mode 100644 index 67784463f6f5a3ba7d2e10810810ab2d51715842..0000000000000000000000000000000000000000 --- a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt +++ /dev/null @@ -1,57 +0,0 @@ -Altera SOCFPGA SoC DWMAC controller - -This is a variant of the dwmac/stmmac driver an inherits all descriptions -present in Documentation/devicetree/bindings/net/stmmac.txt. - -The device node has additional properties: - -Required properties: - - compatible : For Cyclone5/Arria5 SoCs it should contain - "altr,socfpga-stmmac". For Arria10/Agilex/Stratix10 SoCs - "altr,socfpga-stmmac-a10-s10". - Along with "snps,dwmac" and any applicable more detailed - designware version numbers documented in stmmac.txt - - altr,sysmgr-syscon : Should be the phandle to the system manager node that - encompasses the glue register, the register offset, and the register shift. - On Cyclone5/Arria5, the register shift represents the PHY mode bits, while - on the Arria10/Stratix10/Agilex platforms, the register shift represents - bit for each emac to enable/disable signals from the FPGA fabric to the - EMAC modules. - - altr,f2h_ptp_ref_clk use f2h_ptp_ref_clk instead of default eosc1 clock - for ptp ref clk. This affects all emacs as the clock is common. - -Optional properties: -altr,emac-splitter: Should be the phandle to the emac splitter soft IP node if - DWMAC controller is connected emac splitter. -phy-mode: The phy mode the ethernet operates in -altr,gmii-to-sgmii-converter: phandle to the TSE SGMII converter - -This device node has additional phandle dependency, the sgmii converter: - -Required properties: - - compatible : Should be altr,gmii-to-sgmii-2.0 - - reg-names : Should be "eth_tse_control_port" - -Example: - -gmii_to_sgmii_converter: phy@100000240 { - compatible = "altr,gmii-to-sgmii-2.0"; - reg = <0x00000001 0x00000240 0x00000008>, - <0x00000001 0x00000200 0x00000040>; - reg-names = "eth_tse_control_port"; - clocks = <&sgmii_1_clk_0 &emac1 1 &sgmii_clk_125 &sgmii_clk_125>; - clock-names = "tse_pcs_ref_clk_clock_connection", "tse_rx_cdr_refclk"; -}; - -gmac0: ethernet@ff700000 { - compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac"; - altr,sysmgr-syscon = <&sysmgr 0x60 0>; - reg = <0xff700000 0x2000>; - interrupts = <0 115 4>; - interrupt-names = "macirq"; - mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */ - clocks = <&emac_0_clk>; - clock-names = "stmmaceth"; - phy-mode = "sgmii"; - altr,gmii-to-sgmii-converter = <&gmii_to_sgmii_converter>; -}; diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.yaml b/Documentation/devicetree/bindings/net/socfpga-dwmac.yaml new file mode 100644 index 0000000000000000000000000000000000000000..2568dd90f4555485f18912b5352f191824bb918c --- /dev/null +++ b/Documentation/devicetree/bindings/net/socfpga-dwmac.yaml @@ -0,0 +1,102 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/socfpga-dwmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Altera SOCFPGA SoC DWMAC controller + +maintainers: + - Dinh Nguyen <dinguyen@altera.com> + +description: + This is a variant of the dwmac/stmmac driver an inherits all descriptions + present in Documentation/devicetree/bindings/net/stmmac.txt. + +# We need a select here so we don't match all nodes with 'snps,dwmac' +select: + properties: + compatible: + contains: + enum: + - altr,socfpga-stmmac # For Cyclone5/Arria5 SoCs + - altr,socfpga-stmmac-a10-s10 # For Arria10/Agilex/Stratix10 SoCs + required: + - compatible + +allOf: + - $ref: snps,dwmac.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - altr,socfpga-stmmac + - const: snps,dwmac-3.70a + - const: snps,dwmac + - items: + - enum: + - altr,socfpga-stmmac-a10-s10 + - const: snps,dwmac-3.72a + - const: snps,dwmac + - items: + - enum: + - altr,socfpga-stmmac-a10-s10 + - const: snps,dwmac-3.74a + - const: snps,dwmac + + altr,sysmgr-syscon: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to the sysmgr node + - description: register offset that controls the PHY mode or FPGA signals + - description: register shift for the PHY mode bits or FPGA signals + description: + Should be the phandle to the system manager node that + encompasses the glue register, the register offset, and the register shift. + On Cyclone5/Arria5, the register shift represents the PHY mode bits, while + on the Arria10/Stratix10/Agilex platforms, the register shift represents + bit for each emac to enable/disable signals from the FPGA fabric to the + EMAC modules. + + altr,f2h_ptp_ref_clk: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Use f2h_ptp_ref_clk instead of default eosc1 clock + for ptp ref clk. This affects all emacs as the clock is common. + + altr,emac-splitter: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Should be the phandle to the emac splitter soft IP node if + DWMAC controller is connected emac splitter. + + altr,gmii-to-sgmii-converter: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the TSE SGMII converter. + +required: + - compatible + - reg + - altr,sysmgr-syscon + +additionalProperties: true + +examples: + - | + //Example 1 + gmac0: ethernet@ff700000 { + compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac"; + altr,sysmgr-syscon = <&sysmgr 0x60 0>; + reg = <0xff700000 0x2000>; + interrupts = <0 115 4>; + interrupt-names = "macirq"; + mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */ + clocks = <&emac_0_clk>; + clock-names = "stmmaceth"; + phy-mode = "sgmii"; + altr,gmii-to-sgmii-converter = <&gmii_to_sgmii_converter>; + };
Changes to the binding while converting: - add "snps,dwmac-3.7{0,2,4}a". They are used, but undocumented. - altr,f2h_ptp_ref_clk is not a required property but optional. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> --- .../bindings/net/pcs/altr,gmii-to-sgmii.yaml | 47 ++++++++++ .../devicetree/bindings/net/socfpga-dwmac.txt | 57 ------------ .../devicetree/bindings/net/socfpga-dwmac.yaml | 102 +++++++++++++++++++++ 3 files changed, 149 insertions(+), 57 deletions(-)