| Message ID | 37a0928fa8c1253b197884c68ce1f54239421ac5.1690946442.git.daniel@makrotopia.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 571e9c4968875a78495eccfa26901083d0e6f833 |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [net-next,v3] net: ethernet: mtk_eth_soc: support per-flow accounting on MT7988 | expand |
+ Larysa Zaremba On Wed, Aug 02, 2023 at 04:31:09AM +0100, Daniel Golle wrote: > NETSYS_V3 uses 64 bits for each counters while older SoCs are using > 48/40 bits for each counter. > Support reading per-flow byte and package counters on NETSYS_V3. > > Signed-off-by: Daniel Golle <daniel@makrotopia.org> Hi Daniel, I think you missed Larysa's Reviewed-by tag from v2. In any case, this looks good to me. Reviewed-by: Simon Horman <horms@kernel.org> > --- > v3: correct calculation, local variables > v2: fix typo bytes_cnt_* -> byte_cnt_* > > drivers/net/ethernet/mediatek/mtk_eth_soc.c | 1 + > drivers/net/ethernet/mediatek/mtk_ppe.c | 21 +++++++++++++------- > drivers/net/ethernet/mediatek/mtk_ppe_regs.h | 2 ++ > 3 files changed, 17 insertions(+), 7 deletions(-) > > diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c > index 05be702f19c5..1b89f800f6df 100644 > --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c > +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c > @@ -5064,6 +5064,7 @@ static const struct mtk_soc_data mt7988_data = { > .version = 3, > .offload_version = 2, > .hash_offset = 4, > + .has_accounting = true, > .foe_entry_size = MTK_FOE_ENTRY_V3_SIZE, > .txrx = { > .txd_size = sizeof(struct mtk_tx_dma_v2), > diff --git a/drivers/net/ethernet/mediatek/mtk_ppe.c b/drivers/net/ethernet/mediatek/mtk_ppe.c > index bf1ecb0c1c10..973370c3cb51 100644 > --- a/drivers/net/ethernet/mediatek/mtk_ppe.c > +++ b/drivers/net/ethernet/mediatek/mtk_ppe.c > @@ -92,7 +92,6 @@ static int mtk_ppe_mib_wait_busy(struct mtk_ppe *ppe) > > static int mtk_mib_entry_read(struct mtk_ppe *ppe, u16 index, u64 *bytes, u64 *packets) > { > - u32 byte_cnt_low, byte_cnt_high, pkt_cnt_low, pkt_cnt_high; > u32 val, cnt_r0, cnt_r1, cnt_r2; > int ret; > > @@ -107,12 +106,20 @@ static int mtk_mib_entry_read(struct mtk_ppe *ppe, u16 index, u64 *bytes, u64 *p > cnt_r1 = readl(ppe->base + MTK_PPE_MIB_SER_R1); > cnt_r2 = readl(ppe->base + MTK_PPE_MIB_SER_R2); > > - byte_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R0_BYTE_CNT_LOW, cnt_r0); > - byte_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R1_BYTE_CNT_HIGH, cnt_r1); > - pkt_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R1_PKT_CNT_LOW, cnt_r1); > - pkt_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH, cnt_r2); > - *bytes = ((u64)byte_cnt_high << 32) | byte_cnt_low; > - *packets = (pkt_cnt_high << 16) | pkt_cnt_low; > + if (mtk_is_netsys_v3_or_greater(ppe->eth)) { > + /* 64 bit for each counter */ > + u32 cnt_r3 = readl(ppe->base + MTK_PPE_MIB_SER_R3); > + *bytes = ((u64)cnt_r1 << 32) | cnt_r0; > + *packets = ((u64)cnt_r3 << 32) | cnt_r2; > + } else { > + /* 48 bit byte counter, 40 bit packet counter */ > + u32 byte_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R0_BYTE_CNT_LOW, cnt_r0); > + u32 byte_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R1_BYTE_CNT_HIGH, cnt_r1); > + u32 pkt_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R1_PKT_CNT_LOW, cnt_r1); > + u32 pkt_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH, cnt_r2); > + *bytes = ((u64)byte_cnt_high << 32) | byte_cnt_low; > + *packets = ((u64)pkt_cnt_high << 16) | pkt_cnt_low; > + } > > return 0; > } > diff --git a/drivers/net/ethernet/mediatek/mtk_ppe_regs.h b/drivers/net/ethernet/mediatek/mtk_ppe_regs.h > index a2e61b3eb006..3ce088eef0ef 100644 > --- a/drivers/net/ethernet/mediatek/mtk_ppe_regs.h > +++ b/drivers/net/ethernet/mediatek/mtk_ppe_regs.h > @@ -163,6 +163,8 @@ enum { > #define MTK_PPE_MIB_SER_R2 0x348 > #define MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH GENMASK(23, 0) > > +#define MTK_PPE_MIB_SER_R3 0x34c > + > #define MTK_PPE_MIB_CACHE_CTL 0x350 > #define MTK_PPE_MIB_CACHE_CTL_EN BIT(0) > #define MTK_PPE_MIB_CACHE_CTL_FLUSH BIT(2) > -- > 2.41.0 > >
Hello: This patch was applied to netdev/net-next.git (main) by Paolo Abeni <pabeni@redhat.com>: On Wed, 2 Aug 2023 04:31:09 +0100 you wrote: > NETSYS_V3 uses 64 bits for each counters while older SoCs are using > 48/40 bits for each counter. > Support reading per-flow byte and package counters on NETSYS_V3. > > Signed-off-by: Daniel Golle <daniel@makrotopia.org> > --- > v3: correct calculation, local variables > v2: fix typo bytes_cnt_* -> byte_cnt_* > > [...] Here is the summary with links: - [net-next,v3] net: ethernet: mtk_eth_soc: support per-flow accounting on MT7988 https://git.kernel.org/netdev/net-next/c/571e9c496887 You are awesome, thank you!
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c index 05be702f19c5..1b89f800f6df 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c @@ -5064,6 +5064,7 @@ static const struct mtk_soc_data mt7988_data = { .version = 3, .offload_version = 2, .hash_offset = 4, + .has_accounting = true, .foe_entry_size = MTK_FOE_ENTRY_V3_SIZE, .txrx = { .txd_size = sizeof(struct mtk_tx_dma_v2), diff --git a/drivers/net/ethernet/mediatek/mtk_ppe.c b/drivers/net/ethernet/mediatek/mtk_ppe.c index bf1ecb0c1c10..973370c3cb51 100644 --- a/drivers/net/ethernet/mediatek/mtk_ppe.c +++ b/drivers/net/ethernet/mediatek/mtk_ppe.c @@ -92,7 +92,6 @@ static int mtk_ppe_mib_wait_busy(struct mtk_ppe *ppe) static int mtk_mib_entry_read(struct mtk_ppe *ppe, u16 index, u64 *bytes, u64 *packets) { - u32 byte_cnt_low, byte_cnt_high, pkt_cnt_low, pkt_cnt_high; u32 val, cnt_r0, cnt_r1, cnt_r2; int ret; @@ -107,12 +106,20 @@ static int mtk_mib_entry_read(struct mtk_ppe *ppe, u16 index, u64 *bytes, u64 *p cnt_r1 = readl(ppe->base + MTK_PPE_MIB_SER_R1); cnt_r2 = readl(ppe->base + MTK_PPE_MIB_SER_R2); - byte_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R0_BYTE_CNT_LOW, cnt_r0); - byte_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R1_BYTE_CNT_HIGH, cnt_r1); - pkt_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R1_PKT_CNT_LOW, cnt_r1); - pkt_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH, cnt_r2); - *bytes = ((u64)byte_cnt_high << 32) | byte_cnt_low; - *packets = (pkt_cnt_high << 16) | pkt_cnt_low; + if (mtk_is_netsys_v3_or_greater(ppe->eth)) { + /* 64 bit for each counter */ + u32 cnt_r3 = readl(ppe->base + MTK_PPE_MIB_SER_R3); + *bytes = ((u64)cnt_r1 << 32) | cnt_r0; + *packets = ((u64)cnt_r3 << 32) | cnt_r2; + } else { + /* 48 bit byte counter, 40 bit packet counter */ + u32 byte_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R0_BYTE_CNT_LOW, cnt_r0); + u32 byte_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R1_BYTE_CNT_HIGH, cnt_r1); + u32 pkt_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R1_PKT_CNT_LOW, cnt_r1); + u32 pkt_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH, cnt_r2); + *bytes = ((u64)byte_cnt_high << 32) | byte_cnt_low; + *packets = ((u64)pkt_cnt_high << 16) | pkt_cnt_low; + } return 0; } diff --git a/drivers/net/ethernet/mediatek/mtk_ppe_regs.h b/drivers/net/ethernet/mediatek/mtk_ppe_regs.h index a2e61b3eb006..3ce088eef0ef 100644 --- a/drivers/net/ethernet/mediatek/mtk_ppe_regs.h +++ b/drivers/net/ethernet/mediatek/mtk_ppe_regs.h @@ -163,6 +163,8 @@ enum { #define MTK_PPE_MIB_SER_R2 0x348 #define MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH GENMASK(23, 0) +#define MTK_PPE_MIB_SER_R3 0x34c + #define MTK_PPE_MIB_CACHE_CTL 0x350 #define MTK_PPE_MIB_CACHE_CTL_EN BIT(0) #define MTK_PPE_MIB_CACHE_CTL_FLUSH BIT(2)
NETSYS_V3 uses 64 bits for each counters while older SoCs are using 48/40 bits for each counter. Support reading per-flow byte and package counters on NETSYS_V3. Signed-off-by: Daniel Golle <daniel@makrotopia.org> --- v3: correct calculation, local variables v2: fix typo bytes_cnt_* -> byte_cnt_* drivers/net/ethernet/mediatek/mtk_eth_soc.c | 1 + drivers/net/ethernet/mediatek/mtk_ppe.c | 21 +++++++++++++------- drivers/net/ethernet/mediatek/mtk_ppe_regs.h | 2 ++ 3 files changed, 17 insertions(+), 7 deletions(-)