From patchwork Fri Nov 1 13:31:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Furong Xu <0x1207@gmail.com> X-Patchwork-Id: 13859364 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-pf1-f178.google.com (mail-pf1-f178.google.com [209.85.210.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8536F1A726B; Fri, 1 Nov 2024 13:32:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730467939; cv=none; b=HlO8VSDwBhRCBcIlcC6k7UM2cBqjmH8Jy9EGcy+sjhIGoQnNEbfmNZdRMCJt4k0GK8Eup7SLA5jIBk4IkLyxU6kW4qSMTO41U0TObJFOpYq8Xa/BqGK78yVJYSyeyjq6CYoM8ndJPynmbyHv9wjcDz8gFS/tfuHDsXhWVYNw3mw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730467939; c=relaxed/simple; bh=9Fd3sjcCIaVhTYQ+wJFU2eY7s15Rwj0Qq/VKq1B82+o=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=mdXKq6wTb8oPLKXRF0H77/L2oDl7ki2DvUDm1fepbP7HSrAWksAkxN1gxUYTatA8+ckEZvb+0Cb1XBYaFuZEWRiahN6nteLxMCp61N+NwXy6iAoLosWWPsXs6XRBcBrQMoSexagG63J18d77cs2uVzwMYATv0JSC3Frf07bWMUY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=FBpFoKA0; arc=none smtp.client-ip=209.85.210.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="FBpFoKA0" Received: by mail-pf1-f178.google.com with SMTP id d2e1a72fcca58-71e8235f0b6so1712896b3a.3; Fri, 01 Nov 2024 06:32:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730467935; x=1731072735; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WSZu/g9XVQ4OBhjfgWXfzZ9K4xL0qAuH0SPp3CY/xNQ=; b=FBpFoKA0fXITn6m4a70iRAcXnGreNJmTSLlg4P9YiArM7U62pE2/KxkdNRq4PH3pDX 5usXm793ZE+wfUBmcdph4CKnIDgWb9BAmZhLMYiM7fkaSrHXgVmSXSLmQrDNlfiNY4lz oKkrGBUtpqPBB6i+Yv+rR7+DrGGRtdXzouAW1OwrkwSsnh4lKmlHTTo5nUSiz7q5a0PP SbHNKm80tOcz4ZpZjWrQDH3kcpw+QHKzHUMXkjbZ4hw6w4fTjpeelHqHR6uuolHSv/Ur uH1iKKERXqo6fJGRQvuVBj3QVI6mG6SPUETT8RPkVV27t7PKCtOpKlgibbUKhQvnenMw z5BQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730467935; x=1731072735; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WSZu/g9XVQ4OBhjfgWXfzZ9K4xL0qAuH0SPp3CY/xNQ=; b=j2T1QwG5gbSo+wmIawOk3Cu86JkU/EVaXUkBr0Ze3k9sBM2IXDIP91VGm/vrme5Aqd PocbHISwm5mRsgDg26q17w6SCHw5KhMrZljO7xpJA86VAo1RQ/sjST3FdtmlPn6GJX3M HmGcptkPnNJVZiAPqndBYVE8xBq3b3tNQNp30H4ZIOCozyLrXbKn2DGybDTXc7AJsdEF L+Xs+yGMQcDihbR2cfucr8u6rsCps80/zS+j87lkVyOdGo6J6DLOKM8l2vJV8zr5TmF2 cEjr+/I6OBNMqFNmKtAjCsTNZvURHokEy/jzU8LX+Sr7zIa79hiVE9l+/MMulm967t6i 0MNg== X-Forwarded-Encrypted: i=1; AJvYcCWCrvg0TDSVTbVI02MpRuw6/L2F5f/tw7IATLS/2h7IwXn0aNVa1v1n5Lub/wK/O9FsJpuzdVQtUm/Bmq8=@vger.kernel.org X-Gm-Message-State: AOJu0YynbA3PNM1xbFVsAL9KuqLPIzt/PLBpA/CEiw2Gx5cMz3h7Q0l7 CFcQ9b+tJTapu2Pa3VctQa4nldO7m8kHn50cUNs0y2U1JpsFFfsv899Xew== X-Google-Smtp-Source: AGHT+IGF7uAGvpAFde+C7iiQEDvMzNwtOp/20O3SZCtkAFQcQfB2mAGQ2PDbn/1/Fwt0m21Ysg4F3Q== X-Received: by 2002:a05:6a21:920b:b0:1d9:6ea3:9741 with SMTP id adf61e73a8af0-1db91d440eemr9021850637.4.1730467935225; Fri, 01 Nov 2024 06:32:15 -0700 (PDT) Received: from localhost.localdomain ([129.146.253.192]) by smtp.googlemail.com with ESMTPSA id 41be03b00d2f7-7ee452ac4ffsm2425552a12.25.2024.11.01.06.32.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Nov 2024 06:32:14 -0700 (PDT) From: Furong Xu <0x1207@gmail.com> To: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Vladimir Oltean , Andrew Lunn , Simon Horman , andrew+netdev@lunn.ch, Alexandre Torgue , Jose Abreu , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , xfr@outlook.com, Furong Xu <0x1207@gmail.com> Subject: [PATCH net-next v8 4/8] net: stmmac: Refactor FPE functions to generic version Date: Fri, 1 Nov 2024 21:31:31 +0800 Message-Id: <49de4607bae69ffe751b13329a3c07a990b82419.1730449003.git.0x1207@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org FPE implementation for DWMAC4 and DWXGMAC differs only for: 1) Offset address of MAC_FPE_CTRL_STS and MTL_FPE_CTRL_STS 2) FPRQ(Frame Preemption Residue Queue) field in MAC_RxQ_Ctrl1 3) Bit offset of Frame Preemption Interrupt Enable Refactor FPE functions to avoid code duplication and to simplify the code flow by avoiding the use of function pointers. Signed-off-by: Furong Xu <0x1207@gmail.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 1 - .../net/ethernet/stmicro/stmmac/dwmac4_core.c | 10 -- .../net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 +- .../ethernet/stmicro/stmmac/dwxgmac2_core.c | 2 - drivers/net/ethernet/stmicro/stmmac/hwif.c | 7 + drivers/net/ethernet/stmicro/stmmac/hwif.h | 20 +-- drivers/net/ethernet/stmicro/stmmac/stmmac.h | 1 + .../ethernet/stmicro/stmmac/stmmac_ethtool.c | 4 +- .../net/ethernet/stmicro/stmmac/stmmac_fpe.c | 162 ++++++++++-------- .../net/ethernet/stmicro/stmmac/stmmac_fpe.h | 25 +-- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 8 +- 11 files changed, 105 insertions(+), 137 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h index 28fff6cab812..0c050324997a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h @@ -69,7 +69,6 @@ #define GMAC_RXQCTRL_TACPQE BIT(21) #define GMAC_RXQCTRL_TACPQE_SHIFT 21 #define GMAC_RXQCTRL_FPRQ GENMASK(26, 24) -#define GMAC_RXQCTRL_FPRQ_SHIFT 24 /* MAC Packet Filtering */ #define GMAC_PACKET_FILTER_PR BIT(0) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c index 4d217926820a..c25781874aa7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c @@ -1262,11 +1262,6 @@ const struct stmmac_ops dwmac410_ops = { .set_arp_offload = dwmac4_set_arp_offload, .config_l3_filter = dwmac4_config_l3_filter, .config_l4_filter = dwmac4_config_l4_filter, - .fpe_configure = dwmac5_fpe_configure, - .fpe_send_mpacket = dwmac5_fpe_send_mpacket, - .fpe_irq_status = dwmac5_fpe_irq_status, - .fpe_get_add_frag_size = dwmac5_fpe_get_add_frag_size, - .fpe_set_add_frag_size = dwmac5_fpe_set_add_frag_size, .fpe_map_preemption_class = dwmac5_fpe_map_preemption_class, .add_hw_vlan_rx_fltr = dwmac4_add_hw_vlan_rx_fltr, .del_hw_vlan_rx_fltr = dwmac4_del_hw_vlan_rx_fltr, @@ -1317,11 +1312,6 @@ const struct stmmac_ops dwmac510_ops = { .set_arp_offload = dwmac4_set_arp_offload, .config_l3_filter = dwmac4_config_l3_filter, .config_l4_filter = dwmac4_config_l4_filter, - .fpe_configure = dwmac5_fpe_configure, - .fpe_send_mpacket = dwmac5_fpe_send_mpacket, - .fpe_irq_status = dwmac5_fpe_irq_status, - .fpe_get_add_frag_size = dwmac5_fpe_get_add_frag_size, - .fpe_set_add_frag_size = dwmac5_fpe_set_add_frag_size, .fpe_map_preemption_class = dwmac5_fpe_map_preemption_class, .add_hw_vlan_rx_fltr = dwmac4_add_hw_vlan_rx_fltr, .del_hw_vlan_rx_fltr = dwmac4_del_hw_vlan_rx_fltr, diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h index 917796293c26..efd47db05dbc 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h @@ -85,7 +85,6 @@ #define XGMAC_MCBCQ GENMASK(11, 8) #define XGMAC_MCBCQ_SHIFT 8 #define XGMAC_RQ GENMASK(7, 4) -#define XGMAC_RQ_SHIFT 4 #define XGMAC_UPQ GENMASK(3, 0) #define XGMAC_UPQ_SHIFT 0 #define XGMAC_RXQ_CTRL2 0x000000a8 @@ -96,6 +95,7 @@ #define XGMAC_LPIIS BIT(5) #define XGMAC_PMTIS BIT(4) #define XGMAC_INT_EN 0x000000b4 +#define XGMAC_FPEIE BIT(15) #define XGMAC_TSIE BIT(12) #define XGMAC_LPIIE BIT(5) #define XGMAC_PMTIE BIT(4) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c index 111ba5a524ed..de6ffda31a80 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c @@ -1545,7 +1545,6 @@ const struct stmmac_ops dwxgmac210_ops = { .config_l3_filter = dwxgmac2_config_l3_filter, .config_l4_filter = dwxgmac2_config_l4_filter, .set_arp_offload = dwxgmac2_set_arp_offload, - .fpe_configure = dwxgmac3_fpe_configure, }; static void dwxlgmac2_rx_queue_enable(struct mac_device_info *hw, u8 mode, @@ -1602,7 +1601,6 @@ const struct stmmac_ops dwxlgmac2_ops = { .config_l3_filter = dwxgmac2_config_l3_filter, .config_l4_filter = dwxgmac2_config_l4_filter, .set_arp_offload = dwxgmac2_set_arp_offload, - .fpe_configure = dwxgmac3_fpe_configure, }; int dwxgmac2_setup(struct stmmac_priv *priv) diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.c b/drivers/net/ethernet/stmicro/stmmac/hwif.c index 88cce28b2f98..cfc50289aed6 100644 --- a/drivers/net/ethernet/stmicro/stmmac/hwif.c +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.c @@ -6,6 +6,7 @@ #include "common.h" #include "stmmac.h" +#include "stmmac_fpe.h" #include "stmmac_ptp.h" #include "stmmac_est.h" @@ -185,6 +186,7 @@ static const struct stmmac_hwif_entry { .ptp_off = PTP_GMAC4_OFFSET, .mmc_off = MMC_GMAC4_OFFSET, .est_off = EST_GMAC4_OFFSET, + .fpe_reg = &dwmac5_fpe_reg, }, .desc = &dwmac4_desc_ops, .dma = &dwmac4_dma_ops, @@ -205,6 +207,7 @@ static const struct stmmac_hwif_entry { .ptp_off = PTP_GMAC4_OFFSET, .mmc_off = MMC_GMAC4_OFFSET, .est_off = EST_GMAC4_OFFSET, + .fpe_reg = &dwmac5_fpe_reg, }, .desc = &dwmac4_desc_ops, .dma = &dwmac410_dma_ops, @@ -225,6 +228,7 @@ static const struct stmmac_hwif_entry { .ptp_off = PTP_GMAC4_OFFSET, .mmc_off = MMC_GMAC4_OFFSET, .est_off = EST_GMAC4_OFFSET, + .fpe_reg = &dwmac5_fpe_reg, }, .desc = &dwmac4_desc_ops, .dma = &dwmac410_dma_ops, @@ -246,6 +250,7 @@ static const struct stmmac_hwif_entry { .ptp_off = PTP_XGMAC_OFFSET, .mmc_off = MMC_XGMAC_OFFSET, .est_off = EST_XGMAC_OFFSET, + .fpe_reg = &dwxgmac3_fpe_reg, }, .desc = &dwxgmac210_desc_ops, .dma = &dwxgmac210_dma_ops, @@ -267,6 +272,7 @@ static const struct stmmac_hwif_entry { .ptp_off = PTP_XGMAC_OFFSET, .mmc_off = MMC_XGMAC_OFFSET, .est_off = EST_XGMAC_OFFSET, + .fpe_reg = &dwxgmac3_fpe_reg, }, .desc = &dwxgmac210_desc_ops, .dma = &dwxgmac210_dma_ops, @@ -353,6 +359,7 @@ int stmmac_hwif_init(struct stmmac_priv *priv) mac->est = mac->est ? : entry->est; priv->hw = mac; + priv->fpe_cfg.reg = entry->regs.fpe_reg; priv->ptpaddr = priv->ioaddr + entry->regs.ptp_off; priv->mmcaddr = priv->ioaddr + entry->regs.mmc_off; if (entry->est) diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h index d5a9f01ecac5..64f8ed67dcc4 100644 --- a/drivers/net/ethernet/stmicro/stmmac/hwif.h +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h @@ -420,15 +420,6 @@ struct stmmac_ops { bool en, bool udp, bool sa, bool inv, u32 match); void (*set_arp_offload)(struct mac_device_info *hw, bool en, u32 addr); - void (*fpe_configure)(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, - u32 num_txq, u32 num_rxq, - bool tx_enable, bool pmac_enable); - void (*fpe_send_mpacket)(void __iomem *ioaddr, - struct stmmac_fpe_cfg *cfg, - enum stmmac_mpacket_type type); - int (*fpe_irq_status)(void __iomem *ioaddr, struct net_device *dev); - int (*fpe_get_add_frag_size)(const void __iomem *ioaddr); - void (*fpe_set_add_frag_size)(void __iomem *ioaddr, u32 add_frag_size); int (*fpe_map_preemption_class)(struct net_device *ndev, struct netlink_ext_ack *extack, u32 pclass); @@ -530,16 +521,6 @@ struct stmmac_ops { stmmac_do_callback(__priv, mac, config_l4_filter, __args) #define stmmac_set_arp_offload(__priv, __args...) \ stmmac_do_void_callback(__priv, mac, set_arp_offload, __args) -#define stmmac_fpe_configure(__priv, __args...) \ - stmmac_do_void_callback(__priv, mac, fpe_configure, __args) -#define stmmac_fpe_send_mpacket(__priv, __args...) \ - stmmac_do_void_callback(__priv, mac, fpe_send_mpacket, __args) -#define stmmac_fpe_irq_status(__priv, __args...) \ - stmmac_do_callback(__priv, mac, fpe_irq_status, __args) -#define stmmac_fpe_get_add_frag_size(__priv, __args...) \ - stmmac_do_callback(__priv, mac, fpe_get_add_frag_size, __args) -#define stmmac_fpe_set_add_frag_size(__priv, __args...) \ - stmmac_do_void_callback(__priv, mac, fpe_set_add_frag_size, __args) #define stmmac_fpe_map_preemption_class(__priv, __args...) \ stmmac_do_void_callback(__priv, mac, fpe_map_preemption_class, __args) @@ -678,6 +659,7 @@ struct stmmac_est_ops { stmmac_do_void_callback(__priv, est, irq_status, __args) struct stmmac_regs_off { + const struct stmmac_fpe_reg *fpe_reg; u32 ptp_off; u32 mmc_off; u32 est_off; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h index 816b979e72cc..1d86439b8a14 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h @@ -152,6 +152,7 @@ struct stmmac_fpe_cfg { */ spinlock_t lock; + const struct stmmac_fpe_reg *reg; u32 fpe_csr; /* MAC_FPE_CTRL_STS reg cache */ enum ethtool_mm_verify_status status; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c index 704019e2755b..1d77389ce953 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c @@ -1294,7 +1294,7 @@ static int stmmac_get_mm(struct net_device *ndev, else state->tx_active = false; - frag_size = stmmac_fpe_get_add_frag_size(priv, priv->ioaddr); + frag_size = stmmac_fpe_get_add_frag_size(priv); state->tx_min_frag_size = ethtool_mm_frag_size_add_to_min(frag_size); spin_unlock_irqrestore(&priv->fpe_cfg.lock, flags); @@ -1329,7 +1329,7 @@ static int stmmac_set_mm(struct net_device *ndev, struct ethtool_mm_cfg *cfg, if (!cfg->verify_enabled) fpe_cfg->status = ETHTOOL_MM_VERIFY_STATUS_DISABLED; - stmmac_fpe_set_add_frag_size(priv, priv->ioaddr, frag_size); + stmmac_fpe_set_add_frag_size(priv, frag_size); stmmac_fpe_apply(priv); spin_unlock_irqrestore(&fpe_cfg->lock, flags); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c index 2b99033f9425..affb68604b96 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c @@ -27,58 +27,80 @@ #define STMMAC_MAC_FPE_CTRL_STS_SVER BIT(1) #define STMMAC_MAC_FPE_CTRL_STS_EFPE BIT(0) +/* FPE link-partner hand-shaking mPacket type */ +enum stmmac_mpacket_type { + MPACKET_VERIFY = 0, + MPACKET_RESPONSE = 1, +}; + +struct stmmac_fpe_reg { + const u32 mac_fpe_reg; /* offset of MAC_FPE_CTRL_STS */ + const u32 mtl_fpe_reg; /* offset of MTL_FPE_CTRL_STS */ + const u32 rxq_ctrl1_reg; /* offset of MAC_RxQ_Ctrl1 */ + const u32 fprq_mask; /* Frame Preemption Residue Queue */ + const u32 int_en_reg; /* offset of MAC_Interrupt_Enable */ + const u32 int_en_bit; /* Frame Preemption Interrupt Enable */ +}; + bool stmmac_fpe_supported(struct stmmac_priv *priv) { - return priv->dma_cap.fpesel; + return priv->dma_cap.fpesel && priv->fpe_cfg.reg && + priv->hw->mac->fpe_map_preemption_class; } -void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, - u32 num_txq, u32 num_rxq, - bool tx_enable, bool pmac_enable) +static void stmmac_fpe_configure(struct stmmac_priv *priv, bool tx_enable, + bool pmac_enable) { + struct stmmac_fpe_cfg *cfg = &priv->fpe_cfg; + const struct stmmac_fpe_reg *reg = cfg->reg; + u32 num_rxq = priv->plat->rx_queues_to_use; + void __iomem *ioaddr = priv->ioaddr; u32 value; if (tx_enable) { cfg->fpe_csr = STMMAC_MAC_FPE_CTRL_STS_EFPE; - value = readl(ioaddr + GMAC_RXQ_CTRL1); - value &= ~GMAC_RXQCTRL_FPRQ; - value |= (num_rxq - 1) << GMAC_RXQCTRL_FPRQ_SHIFT; - writel(value, ioaddr + GMAC_RXQ_CTRL1); + value = readl(ioaddr + reg->rxq_ctrl1_reg); + value &= ~reg->fprq_mask; + /* Keep this SHIFT, FIELD_PREP() expects a constant mask :-/ */ + value |= (num_rxq - 1) << __ffs(reg->fprq_mask); + writel(value, ioaddr + reg->rxq_ctrl1_reg); } else { cfg->fpe_csr = 0; } - writel(cfg->fpe_csr, ioaddr + GMAC5_MAC_FPE_CTRL_STS); + writel(cfg->fpe_csr, ioaddr + reg->mac_fpe_reg); - value = readl(ioaddr + GMAC_INT_EN); + value = readl(ioaddr + reg->int_en_reg); if (pmac_enable) { - if (!(value & GMAC_INT_FPE_EN)) { + if (!(value & reg->int_en_bit)) { /* Dummy read to clear any pending masked interrupts */ - readl(ioaddr + GMAC5_MAC_FPE_CTRL_STS); + readl(ioaddr + reg->mac_fpe_reg); - value |= GMAC_INT_FPE_EN; + value |= reg->int_en_bit; } } else { - value &= ~GMAC_INT_FPE_EN; + value &= ~reg->int_en_bit; } - writel(value, ioaddr + GMAC_INT_EN); + writel(value, ioaddr + reg->int_en_reg); } -void dwmac5_fpe_send_mpacket(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, - enum stmmac_mpacket_type type) +static void stmmac_fpe_send_mpacket(struct stmmac_priv *priv, + enum stmmac_mpacket_type type) { - u32 value = cfg->fpe_csr; + const struct stmmac_fpe_reg *reg = priv->fpe_cfg.reg; + void __iomem *ioaddr = priv->ioaddr; + u32 value = priv->fpe_cfg.fpe_csr; if (type == MPACKET_VERIFY) value |= STMMAC_MAC_FPE_CTRL_STS_SVER; else if (type == MPACKET_RESPONSE) value |= STMMAC_MAC_FPE_CTRL_STS_SRSP; - writel(value, ioaddr + GMAC5_MAC_FPE_CTRL_STS); + writel(value, ioaddr + reg->mac_fpe_reg); } -void stmmac_fpe_event_status(struct stmmac_priv *priv, int status) +static void stmmac_fpe_event_status(struct stmmac_priv *priv, int status) { struct stmmac_fpe_cfg *fpe_cfg = &priv->fpe_cfg; @@ -90,8 +112,7 @@ void stmmac_fpe_event_status(struct stmmac_priv *priv, int status) /* LP has sent verify mPacket */ if ((status & FPE_EVENT_RVER) == FPE_EVENT_RVER) - stmmac_fpe_send_mpacket(priv, priv->ioaddr, fpe_cfg, - MPACKET_RESPONSE); + stmmac_fpe_send_mpacket(priv, MPACKET_RESPONSE); /* Local has sent verify mPacket */ if ((status & FPE_EVENT_TVER) == FPE_EVENT_TVER && @@ -107,17 +128,18 @@ void stmmac_fpe_event_status(struct stmmac_priv *priv, int status) spin_unlock(&fpe_cfg->lock); } -int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev) +void stmmac_fpe_irq_status(struct stmmac_priv *priv) { + const struct stmmac_fpe_reg *reg = priv->fpe_cfg.reg; + void __iomem *ioaddr = priv->ioaddr; + struct net_device *dev = priv->dev; + int status = FPE_EVENT_UNKNOWN; u32 value; - int status; - - status = FPE_EVENT_UNKNOWN; /* Reads from the MAC_FPE_CTRL_STS register should only be performed * here, since the status flags of MAC_FPE_CTRL_STS are "clear on read" */ - value = readl(ioaddr + GMAC5_MAC_FPE_CTRL_STS); + value = readl(ioaddr + reg->mac_fpe_reg); if (value & STMMAC_MAC_FPE_CTRL_STS_TRSP) { status |= FPE_EVENT_TRSP; @@ -139,7 +161,7 @@ int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev) netdev_dbg(dev, "FPE: Verify mPacket is received\n"); } - return status; + stmmac_fpe_event_status(priv, status); } /** @@ -164,8 +186,7 @@ static void stmmac_fpe_verify_timer(struct timer_list *t) case ETHTOOL_MM_VERIFY_STATUS_INITIAL: case ETHTOOL_MM_VERIFY_STATUS_VERIFYING: if (fpe_cfg->verify_retries != 0) { - stmmac_fpe_send_mpacket(priv, priv->ioaddr, - fpe_cfg, MPACKET_VERIFY); + stmmac_fpe_send_mpacket(priv, MPACKET_VERIFY); rearm = true; } else { fpe_cfg->status = ETHTOOL_MM_VERIFY_STATUS_FAILED; @@ -175,10 +196,7 @@ static void stmmac_fpe_verify_timer(struct timer_list *t) break; case ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED: - stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, - priv->plat->tx_queues_to_use, - priv->plat->rx_queues_to_use, - true, true); + stmmac_fpe_configure(priv, true, true); break; default: @@ -211,6 +229,10 @@ void stmmac_fpe_init(struct stmmac_priv *priv) priv->fpe_cfg.status = ETHTOOL_MM_VERIFY_STATUS_DISABLED; timer_setup(&priv->fpe_cfg.verify_timer, stmmac_fpe_verify_timer, 0); spin_lock_init(&priv->fpe_cfg.lock); + + if ((!priv->fpe_cfg.reg || !priv->hw->mac->fpe_map_preemption_class) && + priv->dma_cap.fpesel) + dev_info(priv->device, "FPE is not supported by driver.\n"); } void stmmac_fpe_apply(struct stmmac_priv *priv) @@ -221,10 +243,7 @@ void stmmac_fpe_apply(struct stmmac_priv *priv) * Otherwise let the timer code do it. */ if (!fpe_cfg->verify_enabled) { - stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, - priv->plat->tx_queues_to_use, - priv->plat->rx_queues_to_use, - fpe_cfg->tx_enabled, + stmmac_fpe_configure(priv, fpe_cfg->tx_enabled, fpe_cfg->pmac_enabled); } else { fpe_cfg->status = ETHTOOL_MM_VERIFY_STATUS_INITIAL; @@ -246,37 +265,35 @@ void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up) if (is_up && fpe_cfg->pmac_enabled) { /* VERIFY process requires pmac enabled when NIC comes up */ - stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, - priv->plat->tx_queues_to_use, - priv->plat->rx_queues_to_use, - false, true); + stmmac_fpe_configure(priv, false, true); /* New link => maybe new partner => new verification process */ stmmac_fpe_apply(priv); } else { /* No link => turn off EFPE */ - stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, - priv->plat->tx_queues_to_use, - priv->plat->rx_queues_to_use, - false, false); + stmmac_fpe_configure(priv, false, false); } spin_unlock_irqrestore(&fpe_cfg->lock, flags); } -int dwmac5_fpe_get_add_frag_size(const void __iomem *ioaddr) +int stmmac_fpe_get_add_frag_size(struct stmmac_priv *priv) { - return FIELD_GET(FPE_MTL_ADD_FRAG_SZ, - readl(ioaddr + GMAC5_MTL_FPE_CTRL_STS)); + const struct stmmac_fpe_reg *reg = priv->fpe_cfg.reg; + void __iomem *ioaddr = priv->ioaddr; + + return FIELD_GET(FPE_MTL_ADD_FRAG_SZ, readl(ioaddr + reg->mtl_fpe_reg)); } -void dwmac5_fpe_set_add_frag_size(void __iomem *ioaddr, u32 add_frag_size) +void stmmac_fpe_set_add_frag_size(struct stmmac_priv *priv, u32 add_frag_size) { + const struct stmmac_fpe_reg *reg = priv->fpe_cfg.reg; + void __iomem *ioaddr = priv->ioaddr; u32 value; - value = readl(ioaddr + GMAC5_MTL_FPE_CTRL_STS); + value = readl(ioaddr + reg->mtl_fpe_reg); writel(u32_replace_bits(value, add_frag_size, FPE_MTL_ADD_FRAG_SZ), - ioaddr + GMAC5_MTL_FPE_CTRL_STS); + ioaddr + reg->mtl_fpe_reg); } #define ALG_ERR_MSG "TX algorithm SP is not suitable for one-to-many mapping" @@ -334,27 +351,20 @@ int dwmac5_fpe_map_preemption_class(struct net_device *ndev, return 0; } -void dwxgmac3_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, - u32 num_txq, u32 num_rxq, - bool tx_enable, bool pmac_enable) -{ - u32 value; - - if (!tx_enable) { - value = readl(ioaddr + XGMAC_MAC_FPE_CTRL_STS); - - value &= ~STMMAC_MAC_FPE_CTRL_STS_EFPE; - - writel(value, ioaddr + XGMAC_MAC_FPE_CTRL_STS); - return; - } - - value = readl(ioaddr + XGMAC_RXQ_CTRL1); - value &= ~XGMAC_RQ; - value |= (num_rxq - 1) << XGMAC_RQ_SHIFT; - writel(value, ioaddr + XGMAC_RXQ_CTRL1); - - value = readl(ioaddr + XGMAC_MAC_FPE_CTRL_STS); - value |= STMMAC_MAC_FPE_CTRL_STS_EFPE; - writel(value, ioaddr + XGMAC_MAC_FPE_CTRL_STS); -} +const struct stmmac_fpe_reg dwmac5_fpe_reg = { + .mac_fpe_reg = GMAC5_MAC_FPE_CTRL_STS, + .mtl_fpe_reg = GMAC5_MTL_FPE_CTRL_STS, + .rxq_ctrl1_reg = GMAC_RXQ_CTRL1, + .fprq_mask = GMAC_RXQCTRL_FPRQ, + .int_en_reg = GMAC_INT_EN, + .int_en_bit = GMAC_INT_FPE_EN, +}; + +const struct stmmac_fpe_reg dwxgmac3_fpe_reg = { + .mac_fpe_reg = XGMAC_MAC_FPE_CTRL_STS, + .mtl_fpe_reg = XGMAC_MTL_FPE_CTRL_STS, + .rxq_ctrl1_reg = XGMAC_RXQ_CTRL1, + .fprq_mask = XGMAC_RQ, + .int_en_reg = XGMAC_INT_EN, + .int_en_bit = XGMAC_FPEIE, +}; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h index fc9d869f9b6a..b5a896d315bf 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h @@ -12,35 +12,20 @@ #define STMMAC_FPE_MM_MAX_VERIFY_RETRIES 3 #define STMMAC_FPE_MM_MAX_VERIFY_TIME_MS 128 -/* FPE link-partner hand-shaking mPacket type */ -enum stmmac_mpacket_type { - MPACKET_VERIFY = 0, - MPACKET_RESPONSE = 1, -}; - struct stmmac_priv; -struct stmmac_fpe_cfg; void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up); -void stmmac_fpe_event_status(struct stmmac_priv *priv, int status); bool stmmac_fpe_supported(struct stmmac_priv *priv); void stmmac_fpe_init(struct stmmac_priv *priv); void stmmac_fpe_apply(struct stmmac_priv *priv); +void stmmac_fpe_irq_status(struct stmmac_priv *priv); +int stmmac_fpe_get_add_frag_size(struct stmmac_priv *priv); +void stmmac_fpe_set_add_frag_size(struct stmmac_priv *priv, u32 add_frag_size); -void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, - u32 num_txq, u32 num_rxq, - bool tx_enable, bool pmac_enable); -void dwmac5_fpe_send_mpacket(void __iomem *ioaddr, - struct stmmac_fpe_cfg *cfg, - enum stmmac_mpacket_type type); -int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev); -int dwmac5_fpe_get_add_frag_size(const void __iomem *ioaddr); -void dwmac5_fpe_set_add_frag_size(void __iomem *ioaddr, u32 add_frag_size); int dwmac5_fpe_map_preemption_class(struct net_device *ndev, struct netlink_ext_ack *extack, u32 pclass); -void dwxgmac3_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, - u32 num_txq, u32 num_rxq, - bool tx_enable, bool pmac_enable); +extern const struct stmmac_fpe_reg dwmac5_fpe_reg; +extern const struct stmmac_fpe_reg dwxgmac3_fpe_reg; #endif diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 342edec8b507..12f0db0e8830 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -5955,12 +5955,8 @@ static void stmmac_common_interrupt(struct stmmac_priv *priv) stmmac_est_irq_status(priv, priv, priv->dev, &priv->xstats, tx_cnt); - if (stmmac_fpe_supported(priv)) { - int status = stmmac_fpe_irq_status(priv, priv->ioaddr, - priv->dev); - - stmmac_fpe_event_status(priv, status); - } + if (stmmac_fpe_supported(priv)) + stmmac_fpe_irq_status(priv); /* To handle GMAC own interrupts */ if ((priv->plat->has_gmac) || xmac) {