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[net-next] net: dpaa2-mac: add support for more ethtool 10G link modes

Message ID E1lJeO1-0008Vj-Jk@rmk-PC.armlinux.org.uk (mailing list archive)
State Deferred
Delegated to: Netdev Maintainers
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Series [net-next] net: dpaa2-mac: add support for more ethtool 10G link modes | expand

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Commit Message

Russell King (Oracle) March 9, 2021, 3:35 p.m. UTC
Phylink documentation says:
 * Note that the PHY may be able to transform from one connection
 * technology to another, so, eg, don't clear 1000BaseX just
 * because the MAC is unable to BaseX mode. This is more about
 * clearing unsupported speeds and duplex settings. The port modes
 * should not be cleared; phylink_set_port_modes() will help with this.

So add the missing 10G modes. This allows SFP+ modules to be used with
the SolidRun boards.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
 drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Andrew Lunn March 10, 2021, 2:01 a.m. UTC | #1
On Tue, Mar 09, 2021 at 03:35:05PM +0000, Russell King wrote:
> Phylink documentation says:
>  * Note that the PHY may be able to transform from one connection
>  * technology to another, so, eg, don't clear 1000BaseX just
>  * because the MAC is unable to BaseX mode. This is more about
>  * clearing unsupported speeds and duplex settings. The port modes
>  * should not be cleared; phylink_set_port_modes() will help with this.
> 
> So add the missing 10G modes. This allows SFP+ modules to be used with
> the SolidRun boards.
> 
> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew
diff mbox series

Patch

diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
index ccaf7e35abeb..c2a889ac089a 100644
--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
@@ -125,6 +125,11 @@  static void dpaa2_mac_validate(struct phylink_config *config,
 	case PHY_INTERFACE_MODE_10GBASER:
 	case PHY_INTERFACE_MODE_USXGMII:
 		phylink_set(mask, 10000baseT_Full);
+		phylink_set(mask, 10000baseCR_Full);
+		phylink_set(mask, 10000baseSR_Full);
+		phylink_set(mask, 10000baseLR_Full);
+		phylink_set(mask, 10000baseLRM_Full);
+		phylink_set(mask, 10000baseER_Full);
 		if (state->interface == PHY_INTERFACE_MODE_10GBASER)
 			break;
 		phylink_set(mask, 5000baseT_Full);