Message ID | E1ms4WD-00EKLK-Ld@rmk-PC.armlinux.org.uk (mailing list archive) |
---|---|
State | Accepted |
Commit | 0dc1df05988820a5f51621ca373988082e155e53 |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | [net-next] net: mvneta: program 1ms autonegotiation clock divisor | expand |
On Tue, 30 Nov 2021 14:54:05 +0000 Russell King <rmk+kernel@armlinux.org.uk> wrote: > Program the 1ms autonegotiation clock divisor according to the clocking > rate of neta - without this, the 1ms clock ticks at about 660us on > Armada 38x configured for 250MHz. Bring this into correct specification. > > Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Marek Behún <kabel@kernel.org>
Hello: This patch was applied to netdev/net-next.git (master) by Jakub Kicinski <kuba@kernel.org>: On Tue, 30 Nov 2021 14:54:05 +0000 you wrote: > Program the 1ms autonegotiation clock divisor according to the clocking > rate of neta - without this, the 1ms clock ticks at about 660us on > Armada 38x configured for 250MHz. Bring this into correct specification. > > Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> > --- > drivers/net/ethernet/marvell/mvneta.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) Here is the summary with links: - [net-next] net: mvneta: program 1ms autonegotiation clock divisor https://git.kernel.org/netdev/net-next/c/0dc1df059888 You are awesome, thank you!
diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c index 2368ae3f0e10..ce810fc3c1a2 100644 --- a/drivers/net/ethernet/marvell/mvneta.c +++ b/drivers/net/ethernet/marvell/mvneta.c @@ -3948,7 +3948,7 @@ static void mvneta_mac_config(struct phylink_config *config, unsigned int mode, } else if (state->interface == PHY_INTERFACE_MODE_SGMII) { /* SGMII mode receives the state from the PHY */ new_ctrl2 |= MVNETA_GMAC2_INBAND_AN_ENABLE; - new_clk |= MVNETA_GMAC_1MS_CLOCK_ENABLE; + new_clk = MVNETA_GMAC_1MS_CLOCK_ENABLE; new_an = (new_an & ~(MVNETA_GMAC_FORCE_LINK_DOWN | MVNETA_GMAC_FORCE_LINK_PASS | MVNETA_GMAC_CONFIG_MII_SPEED | @@ -3960,7 +3960,7 @@ static void mvneta_mac_config(struct phylink_config *config, unsigned int mode, } else { /* 802.3z negotiation - only 1000base-X */ new_ctrl0 |= MVNETA_GMAC0_PORT_1000BASE_X; - new_clk |= MVNETA_GMAC_1MS_CLOCK_ENABLE; + new_clk = MVNETA_GMAC_1MS_CLOCK_ENABLE; new_an = (new_an & ~(MVNETA_GMAC_FORCE_LINK_DOWN | MVNETA_GMAC_FORCE_LINK_PASS | MVNETA_GMAC_CONFIG_MII_SPEED)) | @@ -3973,6 +3973,10 @@ static void mvneta_mac_config(struct phylink_config *config, unsigned int mode, new_an |= MVNETA_GMAC_AN_FLOW_CTRL_EN; } + /* Set the 1ms clock divisor */ + if (new_clk == MVNETA_GMAC_1MS_CLOCK_ENABLE) + new_clk |= clk_get_rate(pp->clk) / 1000; + /* Armada 370 documentation says we can only change the port mode * and in-band enable when the link is down, so force it down * while making these changes. We also do this for GMAC_CTRL2
Program the 1ms autonegotiation clock divisor according to the clocking rate of neta - without this, the 1ms clock ticks at about 660us on Armada 38x configured for 250MHz. Bring this into correct specification. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> --- drivers/net/ethernet/marvell/mvneta.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)