From patchwork Wed Jun 29 12:51:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 12900010 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF83CC43334 for ; Wed, 29 Jun 2022 12:51:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233427AbiF2Mvl (ORCPT ); Wed, 29 Jun 2022 08:51:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231690AbiF2Mvj (ORCPT ); Wed, 29 Jun 2022 08:51:39 -0400 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [IPv6:2001:4d48:ad52:32c8:5054:ff:fe00:142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E6DD933344 for ; Wed, 29 Jun 2022 05:51:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=KWK8sKKLFR+68SMkB5FGReiHrYFC6ByuHPtr0wPhHIU=; b=tN6QLzrLD0PGySaj1xXFrRUHrE S5luWpg906s9a6dxoMT6V/eTdga40ErgDq+GWMpJq1u7ZXDimDavWTEp15UDL0rVkSlIfjUYP4Tnw 1o5qYRq4n6QXy9XAxCS1GLv5TcC1M2EI1yTG5bEFlGscZh/klMHDCBFcw5DybKc9sfwPBtSJbCDkL xT/dpF0jpSASeA7D5Yj+DF3pKXVAZi7h4AlJ8+pFG/N0h1ASIwSdMuogin6MNip+XnJsXH+3nagd0 e+L2/FUyN/GkZeMseoUKJJDZZWR0Dk+7nwGHqdnc1srM2rajZjYWmRxfm9uepg7pqGYbwCrOwLp8b DphyPHGw==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:35712 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1o6XAG-00036d-LJ; Wed, 29 Jun 2022 13:51:28 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1o6XAF-004pVi-Ue; Wed, 29 Jun 2022 13:51:27 +0100 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Alexandre Belloni , "Alvin __ipraga" , Claudiu Manoil , "David S. Miller" , DENG Qingfang , Eric Dumazet , Florian Fainelli , George McCollister , Hauke Mehrtens , Jakub Kicinski , Kurt Kanzenbach , Landen Chao , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Matthias Brugger , netdev@vger.kernel.org, Paolo Abeni , Sean Wang , UNGLinuxDriver@microchip.com, Vivien Didelot , Vladimir Oltean , Woojung Huh , Marek =?iso-8859-1?q?Beh=FAn?= Subject: [PATCH RFC net-next 2/6] net: dsa: mv88e6xxx: report the default interface mode for the port MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Wed, 29 Jun 2022 13:51:27 +0100 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Report the maximum speed interface mode for the port, or if we don't have that information, the hardware configured interface mode for the port. This allows phylink to know which interface mode CPU and DSA ports are operating, which will be necessary when we want to select the maximum speed for the port (required for such ports without a PHY or fixed-link specified in firmware.) Signed-off-by: Russell King (Oracle) --- drivers/net/dsa/mv88e6xxx/chip.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index f98be98551ef..1c6b4b00d58d 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -823,6 +823,7 @@ static void mv88e6xxx_get_caps(struct dsa_switch *ds, int port, phy_interface_t *default_interface) { struct mv88e6xxx_chip *chip = ds->priv; + u8 cmode = chip->ports[port].cmode; chip->info->ops->phylink_get_caps(chip, port, config); @@ -830,6 +831,14 @@ static void mv88e6xxx_get_caps(struct dsa_switch *ds, int port, if (mv88e6xxx_phy_is_internal(ds, port)) __set_bit(PHY_INTERFACE_MODE_GMII, config->supported_interfaces); + + if (chip->info->ops->port_max_speed_mode) + *default_interface = chip->info->ops->port_max_speed_mode(port); + else if (cmode < ARRAY_SIZE(mv88e6xxx_phy_interface_modes) && + mv88e6xxx_phy_interface_modes[cmode]) + *default_interface = mv88e6xxx_phy_interface_modes[cmode]; + else if (cmode == MV88E6XXX_PORT_STS_CMODE_RGMII) + *default_interface = PHY_INTERFACE_MODE_RGMII; } static void mv88e6xxx_mac_config(struct dsa_switch *ds, int port,