From patchwork Tue Nov 26 12:52:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 13885877 X-Patchwork-Delegate: kuba@kernel.org Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 20F2D1CEE8A for ; Tue, 26 Nov 2024 12:52:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732625581; cv=none; b=EZGv0CPH/vqqVCB1ogXtngN6RdZW1mqMP92x0N2AGpPOq0LkIChdBFWaTTZFRt766wU2g6W3alCVS9A2cbcEpzcX3K3MESHwhOelDRCNa58aqRSgFiJH5W9/vWgT1vevB5I6HHnwu4aBDA2ASnCeZDK1+vBnK3IgsWUMRasbWcw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732625581; c=relaxed/simple; bh=evL1OQos5EuPDX/rUaBZj5SIFXLeAgYT/3PPMQsNIIQ=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=eXWXYvCMkwfsMMmKaAcDI5OnzyEJMG6Zr7Pqw9nq0K7HFq8DD2FF3Gd8gTk7K2v/C9StinJKImulD/ZpbecCnmBEBzEEY5I2p6U+yWytO6DCbC3k90P2XPVgW57HKokcogMWzk8gaHUY8O0abzU/TbRKv/Fi4rZhSJaooxRP2SQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=1mIxpqoA; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="1mIxpqoA" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=4+/h+G+UZmcLpKhAAeUc1gCUmuIP7h4zUAThZbIDIwU=; b=1mIxpqoAoFisMNMn11GMy+5cnR ohJgIwSgsqReB+QUQ35N7RT4b7vvZ9RnOeGjjLwcPz/1LzQ62REBrnlaYYSU+ug85kq2y7fdTkm4V vBpYThK63VxRMi/ISMhi/VBoOZ46nPDgx/Vdvy8pc72Fc5uYf+PyPEYmLhDA6NwHBvQ+S9EdQX7pY tf5Inb/igj2paGv6ldTMjDl/l5mBFcyV1DfDhzbb7GEZLS0BxNg8AXsg6WLctEmmZ7/Bcs5CVLBVC Pg+WDIw5Pb+K+a+zZ3/0eQOSdkq7Sb43f1nVOHNmGsJwixWfycqKbCZHaRYD490RzHZKpjI0MVBGP zPEjnZJg==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:58798 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tFv3g-0006tH-0B; Tue, 26 Nov 2024 12:52:48 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1tFv3e-005yhx-SV; Tue, 26 Nov 2024 12:52:46 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Alexandre Torgue , Andrew Lunn , Bryan Whitehead , "David S. Miller" , Eric Dumazet , Florian Fainelli , Jakub Kicinski , Jose Abreu , linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Marcin Wojtas , Maxime Coquelin , netdev@vger.kernel.org, Oleksij Rempel , Paolo Abeni , UNGLinuxDriver@microchip.com Subject: [PATCH RFC net-next 07/23] net: mdio: add definition for clock stop capable bit Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Tue, 26 Nov 2024 12:52:46 +0000 X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Add a definition for the clock stop capable bit in the PCS MMD. This bit indicates whether the MAC is able to stop the transmit xMII clock while it is signalling LPI. Signed-off-by: Russell King (Oracle) --- include/uapi/linux/mdio.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h index f0d3f268240d..6975f182b22c 100644 --- a/include/uapi/linux/mdio.h +++ b/include/uapi/linux/mdio.h @@ -125,6 +125,7 @@ #define MDIO_STAT1_LPOWERABLE 0x0002 /* Low-power ability */ #define MDIO_STAT1_LSTATUS BMSR_LSTATUS #define MDIO_STAT1_FAULT 0x0080 /* Fault */ +#define MDIO_PCS_STAT1_CLKSTOP_CAP 0x0040 #define MDIO_AN_STAT1_LPABLE 0x0001 /* Link partner AN ability */ #define MDIO_AN_STAT1_ABLE BMSR_ANEGCAPABLE #define MDIO_AN_STAT1_RFAULT BMSR_RFAULT