From patchwork Tue Mar 4 10:53:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 14000433 X-Patchwork-Delegate: kuba@kernel.org Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 501F91FE461 for ; Tue, 4 Mar 2025 10:53:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741085634; cv=none; b=Ca6y6BYSD2RkUhfql44gjQhg2ThSx5Rm/dlFfC45MSxQ8z0fDuQn3xKPCEEzkDU2lXRXf+7UgMzHpZgslZEtrMhKIo7w4sBoaC6zQrww5h/GCRVBDOW2MXYcT5OKcBnkkdBUQrC0dy+EDDxN16S6OfbDNIEfdn/hlBrW+a9NVS4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741085634; c=relaxed/simple; bh=I3j20PNvc8YncJiPmitRrdrKR9xFVjCm2cgc8iLWv64=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=nGqrUqrE5swppd+pMdkA9T5WKjVAEazq8f6te00CQz0LERqtcSk7fiKspmJSQDdPSRCu+jvbOiLn9zw3b7QAmYgpsQDJhv6jZ5d+9rysMaRZsX/Z3kgsJseVRF096PM/A/IoyKQPPkPLvWWiW96S//jxFf5PMd06D6KSuc/nIZE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=K+ht9TM7; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="K+ht9TM7" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=BXrgPDsYX+qi5PCKnDMpC3DGuTxL3IQ2NcTFG6yM2Jg=; b=K+ht9TM7v1cHDvM/DqveKBITq5 iX88tAr8kWKXUcwXJUV2IDI3D1Dh66xz/oeXN4UAuFIzDYdZYSoxB+p791/5mHbJRUFNzYUpOJqEF QXBL0CMjq6iNIv9BbHUYxV9bjcV681CbpFI2Fjk9GlrnriOrhbM+HOEtpbnT1t5bFKciWzoo/6PH5 7JByaOL1P4GiDS6PnAum2n0wLHDp+jeAN30MPSDAj1u4qpoSyWhhN39u+6w9/biPokN/JizVlPWk6 ljdvVjlAqMXPiFuJIV9PB3ZmdA08dCkof2CyPD4FkWMx2on4USxoxYN5bZIBHMVOmf2vNe+9Dv1cP 191CsabQ==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:53414 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tpPuE-0002Ux-1M; Tue, 04 Mar 2025 10:53:46 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1tpPtu-005Soa-Ac; Tue, 04 Mar 2025 10:53:26 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Jon Hunter , Thierry Reding , "Lad, Prabhakar" Cc: Alexandre Torgue , Andrew Lunn , Andrew Lunn , "David S. Miller" , Eric Dumazet , Heiner Kallweit , Jakub Kicinski , linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Maxime Coquelin , netdev@vger.kernel.org, Paolo Abeni Subject: [PATCH RFC net-next 2/3] net: phylink: add functions to block/unblock rx clock stop Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Tue, 04 Mar 2025 10:53:26 +0000 X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Some MACs require the PHY receive clock to be running to complete setup actions. This may fail if the PHY has negotiated EEE, the MAC supports receive clock stop, and the link has entered LPI state. Provide a pair of APIs that MAC drivers can use to temporarily block the PHY disabling the receive clock. Signed-off-by: Russell King (Oracle) --- drivers/net/phy/phylink.c | 62 +++++++++++++++++++++++++++++++-------- include/linux/phylink.h | 3 ++ 2 files changed, 53 insertions(+), 12 deletions(-) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 0aae0bb2a254..9a62808cf935 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -88,6 +88,7 @@ struct phylink { bool mac_enable_tx_lpi; bool mac_tx_clk_stop; u32 mac_tx_lpi_timer; + u8 mac_rx_clk_stop_blocked; struct sfp_bus *sfp_bus; bool sfp_may_have_phy; @@ -2592,6 +2593,55 @@ void phylink_stop(struct phylink *pl) } EXPORT_SYMBOL_GPL(phylink_stop); + +void phylink_rx_clk_stop_block(struct phylink *pl) +{ + ASSERT_RTNL(); + + if (pl->mac_rx_clk_stop_blocked == U8_MAX) { + phylink_warn(pl, "%s called too many times - ignoring\n", + __func__); + dump_stack(); + return; + } + + /* Disable PHY receive clock stop if this is the first time this + * function has been called and clock-stop was previously enabled. + */ + if (pl->mac_rx_clk_stop_blocked++ == 0 && + pl->mac_supports_eee_ops && pl->phydev) + pl->config->eee_rx_clk_stop_enable) + phy_eee_rx_clock_stop(pl->phydev, false); +} + +/** + * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock + * @pl: a pointer to a &struct phylink returned from phylink_create() + * + * All calls to phylink_rx_clk_stop_block() must be balanced with a + * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs + * clock stop ability. + */ +void phylink_rx_clk_stop_unblock(struct phylink *pl) +{ + ASSERT_RTNL(); + + if (pl->mac_rx_clk_stop_blocked == 0) { + phylink_warn(pl, "%s called too many times - ignoring\n", + __func__); + dump_stack(); + return; + } + + /* Re-enable PHY receive clock stop if the number of unblocks matches + * the number of calls to the block function above. + */ + if (--pl->mac_rx_clk_stop_blocked == 0 && + pl->mac_supports_eee_ops && pl->phydev && + pl->config->eee_rx_clk_stop_enable) + phy_eee_rx_clock_stop(pl->phydev, true); +} + /** * phylink_suspend() - handle a network device suspend event * @pl: a pointer to a &struct phylink returned from phylink_create() @@ -2649,18 +2699,6 @@ void phylink_resume(struct phylink *pl) ASSERT_RTNL(); - if (pl->mac_supports_eee_ops && pl->phydev) { - /* Explicitly configure whether the PHY is allowed to stop its - * receive clock on resume to ensure that it is correctly - * configured. - */ - ret = phy_eee_rx_clock_stop(pl->phydev, - pl->config->eee_rx_clk_stop_enable); - if (ret == -EOPNOTSUPP) - phylink_warn(pl, "failed to set rx clock stop: %pe\n", - ERR_PTR(ret)); - } - if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { /* Wake-on-Lan enabled, MAC handling */ diff --git a/include/linux/phylink.h b/include/linux/phylink.h index 08df65f6867a..249c437d6b7b 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -698,6 +698,9 @@ int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs); void phylink_start(struct phylink *); void phylink_stop(struct phylink *); +void phylink_rx_clk_stop_block(struct phylink *); +void phylink_rx_clk_stop_unblock(struct phylink *); + void phylink_suspend(struct phylink *pl, bool mac_wol); void phylink_resume(struct phylink *pl);