@@ -1014,7 +1014,7 @@ qca8k_setup_mdio_bus(struct qca8k_priv *priv)
return ret;
}
- if (!dsa_is_user_port(priv->ds, reg))
+ if (reg == 0 || reg == 6)
continue;
of_get_phy_mode(port, &mode);
@@ -1089,17 +1089,19 @@ qca8k_setup_mac_pwr_sel(struct qca8k_priv *priv)
static int qca8k_find_cpu_port(struct dsa_switch *ds)
{
- struct qca8k_priv *priv = ds->priv;
+ int i;
- /* Find the connected cpu port. Valid port are 0 or 6 */
if (dsa_is_cpu_port(ds, 0))
return 0;
- dev_dbg(priv->dev, "port 0 is not the CPU port. Checking port 6");
-
if (dsa_is_cpu_port(ds, 6))
return 6;
+ /* PHY-to-PHY link */
+ for (i = 1; i <= 5; i++)
+ if (dsa_is_cpu_port(ds, i))
+ return i;
+
return -EINVAL;
}
internal-PHY-to-PHY CPU link is a common/demo design in IPQ50xx platform, since it only has a SGMII/SGMII+ link and a MDI link. For DSA, CPU tag is the only requirement. Fortunately, qca8337 can enable it on any port. So it's ok to trust a internal-PHY-to-PHY link as a CPU link. Signed-off-by: Ziyang Huang <hzyitc@outlook.com> --- drivers/net/dsa/qca/qca8k-8xxx.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-)