From patchwork Thu Jun 22 04:18:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13288255 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F192CEB64D8 for ; Thu, 22 Jun 2023 04:19:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230230AbjFVETo (ORCPT ); Thu, 22 Jun 2023 00:19:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229608AbjFVETn (ORCPT ); Thu, 22 Jun 2023 00:19:43 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 92BA719C; Wed, 21 Jun 2023 21:19:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1687407582; x=1718943582; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=rKgnFurbdIRdoh4CHd4XKUen+Eh+ergId4ed9rxs1x8=; b=gj96WUnnBYTye/kmRrfT2ZVvXrLM1DUUXYOZQyYq6oV++xu0RFbgIXVM Z1l79ss+1h0KOQziz4jbh3O/VgPQjnp6JNLQOHCGre0jt+aYx71SrwlKR lgCaNfAmcchuHagP/0Zk53Z99bwN/wUD0YOaSIsd7bwF1HPR+8xnaEqyW j4wI8fWuAtxgLTdFg8j7em+3Q2C6x9/2X4qlbhZTurtxHBgTjwDD5tryC K1PcmEQ8BUOzGr0qFkk96Ss3AYgRyvb1tLLMmZlN0C9dzLvGnaiNHijiR FsCCJJJKkUTVEzUm4VmjiDgm8F8PuNj+zp7xmez5GzQKxDopNczzNOGIC w==; X-IronPort-AV: E=McAfee;i="6600,9927,10748"; a="363811732" X-IronPort-AV: E=Sophos;i="6.00,262,1681196400"; d="scan'208";a="363811732" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jun 2023 21:19:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10748"; a="744453724" X-IronPort-AV: E=Sophos;i="6.00,262,1681196400"; d="scan'208";a="744453724" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by orsmga008.jf.intel.com with ESMTP; 21 Jun 2023 21:19:27 -0700 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Jose Abreu , Andrew Lunn , Heiner Kallweit , Russell King , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , =?utf-8?q?Marek_Beh=C3=BAn?= , Jean Delvare , Guenter Roeck , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Philipp Zabel , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Wong Vee Khee , Jon Hunter , Jesse Brandeburg , Revanth Kumar Uppala , Shenwei Wang , Andrey Konovalov , Jochen Henneberg Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Tan@vger.kernel.org, Tee Min , Michael Sit Wei Hong , Lai Peter Jun Ann Subject: [PATCH net-next 0/6] TSN auto negotiation between 1G and 2.5G Date: Thu, 22 Jun 2023 12:18:59 +0800 Message-Id: <20230622041905.629430-1-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Intel platforms’ integrated Gigabit Ethernet controllers support 2.5Gbps mode statically using BIOS programming. In the current implementation, the BIOS menu provides an option to select between 10/100/1000Mbps and 2.5Gbps modes. Based on the selection, the BIOS programs the Phase Lock Loop (PLL) registers. The BIOS also read the TSN lane registers from Flexible I/O Adapter (FIA) block and provided 10/100/1000Mbps/2.5Gbps information to the stmmac driver. But auto-negotiation between 10/100/1000Mbps and 2.5Gbps is not allowed. The new proposal is to support auto-negotiation between 10/100/1000Mbps and 2.5Gbps . Auto-negotiation between 10, 100, 1000Mbps will use in-band auto negotiation. Auto-negotiation between 10/100/1000Mbps and 2.5Gbps will work as the following proposed flow, the stmmac driver reads the PHY link status registers then identifies the negotiated speed. Based on the speed stmmac driver will identify TSN lane registers from FIA then send IPC command to the Power Management controller (PMC) through PMC driver/API. PMC will act as a proxy to programs the PLL registers. Choong Yong Liang (1): net: stmmac: Add 1G/2.5G auto-negotiation support for ADL-N David E. Box (1): platform/x86: intel_pmc_core: Add IPC mailbox accessor function and add SoC register access Michael Sit Wei Hong (1): stmmac: intel: Separate driver_data of ADL-N from TGL Tan, Tee Min (3): net: pcs: xpcs: combine C37 SGMII AN and 2500BASEX for Intel mGbE controller net: phy: update in-band AN mode when changing interface by PHY driver net: stmmac: enable Intel mGbE 1G/2.5G auto-negotiation support MAINTAINERS | 1 + drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 + .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 183 +++++++++++++++++- .../net/ethernet/stmicro/stmmac/dwmac-intel.h | 81 ++++++++ .../net/ethernet/stmicro/stmmac/stmmac_main.c | 20 ++ drivers/net/pcs/pcs-xpcs.c | 72 +++++-- drivers/net/phy/marvell10g.c | 6 + drivers/net/phy/phylink.c | 3 + drivers/platform/x86/intel/pmc/adl.c | 2 +- drivers/platform/x86/intel/pmc/cnp.c | 2 +- drivers/platform/x86/intel/pmc/core.c | 63 +++++- drivers/platform/x86/intel/pmc/icl.c | 2 +- drivers/platform/x86/intel/pmc/mtl.c | 2 +- drivers/platform/x86/intel/pmc/spt.c | 2 +- drivers/platform/x86/intel/pmc/tgl.c | 2 +- .../core.h => include/linux/intel_pmc_core.h | 27 ++- include/linux/pcs/pcs-xpcs.h | 1 + include/linux/phy.h | 2 + include/linux/stmmac.h | 1 + 19 files changed, 449 insertions(+), 24 deletions(-) rename drivers/platform/x86/intel/pmc/core.h => include/linux/intel_pmc_core.h (95%)