From patchwork Thu Apr 16 08:15:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 11492475 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3D16992C for ; Thu, 16 Apr 2020 08:19:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2A5B1206B9 for ; Thu, 16 Apr 2020 08:19:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2441298AbgDPITT (ORCPT ); Thu, 16 Apr 2020 04:19:19 -0400 Received: from mga06.intel.com ([134.134.136.31]:51571 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2441212AbgDPIQy (ORCPT ); Thu, 16 Apr 2020 04:16:54 -0400 IronPort-SDR: CCX1EAX4Y74qcpg1wu9aDFwtL0C4YspaIYqacfMG9MFuzgdiR9loPP3Mcr0mBKqb64F/p4oX5j hBSfDLzFpmdA== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Apr 2020 01:16:02 -0700 IronPort-SDR: Y7v9PRe2ESqcva4hdhpLzUY07PkImf00lpovM8cPyrn/tWliAisUgtR82VCghOXlBc+QoBDvGf k3BWffA7zQpg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,390,1580803200"; d="scan'208";a="455187383" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga006.fm.intel.com with ESMTP; 16 Apr 2020 01:15:58 -0700 Received: by black.fi.intel.com (Postfix, from userid 1001) id 8507AE2F; Thu, 16 Apr 2020 11:15:53 +0300 (EEST) From: Mika Westerberg To: Andy Shevchenko , Darren Hart , Lee Jones , Greg Kroah-Hartman Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H . Peter Anvin" , x86@kernel.org, Zha Qipeng , "David E . Box" , Guenter Roeck , Heikki Krogerus , Wim Van Sebroeck , Mika Westerberg , platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 10/20] mfd: intel_soc_pmic: Add SCU IPC member to struct intel_soc_pmic Date: Thu, 16 Apr 2020 11:15:42 +0300 Message-Id: <20200416081552.68083-11-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200416081552.68083-1-mika.westerberg@linux.intel.com> References: <20200416081552.68083-1-mika.westerberg@linux.intel.com> MIME-Version: 1.0 Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Both PMIC drivers (intel_soc_pmic_mrfld and intel_soc_pmic_bxtwc) will be using this field going forward to access the SCU IPC instance. While there add kernel-doc for the intel_soc_pmic structure. Signed-off-by: Mika Westerberg Reviewed-by: Andy Shevchenko Acked-for-MFD-by: Lee Jones --- include/linux/mfd/intel_soc_pmic.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/include/linux/mfd/intel_soc_pmic.h b/include/linux/mfd/intel_soc_pmic.h index bfecd6bd4990..6a88e34cb955 100644 --- a/include/linux/mfd/intel_soc_pmic.h +++ b/include/linux/mfd/intel_soc_pmic.h @@ -13,6 +13,20 @@ #include +/** + * struct intel_soc_pmic - Intel SoC PMIC data + * @irq: Master interrupt number of the parent PMIC device + * @regmap: Pointer to the parent PMIC device regmap structure + * @irq_chip_data: IRQ chip data for the PMIC itself + * @irq_chip_data_pwrbtn: Chained IRQ chip data for the Power Button + * @irq_chip_data_tmu: Chained IRQ chip data for the Time Management Unit + * @irq_chip_data_bcu: Chained IRQ chip data for the Burst Control Unit + * @irq_chip_data_adc: Chained IRQ chip data for the General Purpose ADC + * @irq_chip_data_chgr: Chained IRQ chip data for the External Charger + * @irq_chip_data_crit: Chained IRQ chip data for the Critical Event Handler + * @dev: Pointer to the parent PMIC device + * @scu: Pointer to the SCU IPC device data structure + */ struct intel_soc_pmic { int irq; struct regmap *regmap; @@ -24,6 +38,7 @@ struct intel_soc_pmic { struct regmap_irq_chip_data *irq_chip_data_chgr; struct regmap_irq_chip_data *irq_chip_data_crit; struct device *dev; + struct intel_scu_ipc_dev *scu; }; int intel_soc_pmic_exec_mipi_pmic_seq_element(u16 i2c_address, u32 reg_address,