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Tue, 16 Nov 2021 07:41:00 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by DM6NAM11FT021.mail.protection.outlook.com (10.13.173.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4690.15 via Frontend Transport; Tue, 16 Nov 2021 07:40:59 +0000 Received: from Mayan-RMB.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Tue, 16 Nov 2021 01:40:57 -0600 From: Sanket Goswami To: , , CC: , Sanket Goswami Subject: [PATCH 1/2] platform/x86: amd-pmc: Introduce message port argument in SMU routine Date: Tue, 16 Nov 2021 13:09:59 +0530 Message-ID: <20211116074000.28626-2-Sanket.Goswami@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211116074000.28626-1-Sanket.Goswami@amd.com> References: <20211116074000.28626-1-Sanket.Goswami@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 2dfddfc6-d960-456b-8a8b-08d9a8d46f1b X-MS-TrafficTypeDiagnostic: DM4PR12MB5199: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1332; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Nov 2021 07:40:59.9165 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2dfddfc6-d960-456b-8a8b-08d9a8d46f1b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT021.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5199 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Add a msg_port_stb argument to amd_pmc_send_cmd() function signature to distinguish between the components using the different SMU ports. Co-developed-by: Shyam Sundar S K Signed-off-by: Shyam Sundar S K Signed-off-by: Sanket Goswami --- drivers/platform/x86/amd-pmc.c | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/drivers/platform/x86/amd-pmc.c b/drivers/platform/x86/amd-pmc.c index a39354ea96c4..5769d009033a 100644 --- a/drivers/platform/x86/amd-pmc.c +++ b/drivers/platform/x86/amd-pmc.c @@ -41,6 +41,10 @@ #define AMD_PMC_STB_PMI_0 0x03E30600 #define AMD_PMC_STB_PREDEF 0xC6000001 +/* STB message port and Parameters */ +#define PMC_MSG_PORT_PEP 0 +#define PMC_MSG_PORT_STB 1 + /* Base address of SMU for mapping physical address to virtual address */ #define AMD_PMC_SMU_INDEX_ADDRESS 0xB8 #define AMD_PMC_SMU_INDEX_DATA 0xBC @@ -140,7 +144,8 @@ module_param(enable_stb, bool, 0644); MODULE_PARM_DESC(enable_stb, "Enable the STB debug mechanism"); static struct amd_pmc_dev pmc; -static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, u32 arg, u32 *data, u8 msg, bool ret); +static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, u32 arg, u32 *data, u8 msg, bool ret, + u8 msg_port_stb); static int amd_pmc_write_stb(struct amd_pmc_dev *dev, u32 data); static int amd_pmc_read_stb(struct amd_pmc_dev *dev, u32 *buf); @@ -176,7 +181,7 @@ static int amd_pmc_get_smu_version(struct amd_pmc_dev *dev) int rc; u32 val; - rc = amd_pmc_send_cmd(dev, 0, &val, SMU_MSG_GETSMUVERSION, 1); + rc = amd_pmc_send_cmd(dev, 0, &val, SMU_MSG_GETSMUVERSION, 1, PMC_MSG_PORT_PEP); if (rc) return rc; @@ -370,11 +375,12 @@ static int amd_pmc_setup_smu_logging(struct amd_pmc_dev *dev) return -EINVAL; /* Get Active devices list from SMU */ - amd_pmc_send_cmd(dev, 0, &dev->active_ips, SMU_MSG_GET_SUP_CONSTRAINTS, 1); + amd_pmc_send_cmd(dev, 0, &dev->active_ips, SMU_MSG_GET_SUP_CONSTRAINTS, 1, + PMC_MSG_PORT_PEP); /* Get dram address */ - amd_pmc_send_cmd(dev, 0, &phys_addr_low, SMU_MSG_LOG_GETDRAM_ADDR_LO, 1); - amd_pmc_send_cmd(dev, 0, &phys_addr_hi, SMU_MSG_LOG_GETDRAM_ADDR_HI, 1); + amd_pmc_send_cmd(dev, 0, &phys_addr_low, SMU_MSG_LOG_GETDRAM_ADDR_LO, 1, PMC_MSG_PORT_PEP); + amd_pmc_send_cmd(dev, 0, &phys_addr_hi, SMU_MSG_LOG_GETDRAM_ADDR_HI, 1, PMC_MSG_PORT_PEP); smu_phys_addr = ((u64)phys_addr_hi << 32 | phys_addr_low); dev->smu_virt_addr = devm_ioremap(dev->dev, smu_phys_addr, sizeof(struct smu_metrics)); @@ -382,7 +388,7 @@ static int amd_pmc_setup_smu_logging(struct amd_pmc_dev *dev) return -ENOMEM; /* Start the logging */ - amd_pmc_send_cmd(dev, 0, NULL, SMU_MSG_LOG_START, 0); + amd_pmc_send_cmd(dev, 0, NULL, SMU_MSG_LOG_START, 0, PMC_MSG_PORT_PEP); return 0; } @@ -401,7 +407,8 @@ static void amd_pmc_dump_registers(struct amd_pmc_dev *dev) dev_dbg(dev->dev, "AMD_PMC_REGISTER_MESSAGE:%x\n", value); } -static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, u32 arg, u32 *data, u8 msg, bool ret) +static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, u32 arg, u32 *data, u8 msg, bool ret, + u8 msg_port_stb) { int rc; u32 val; @@ -529,8 +536,8 @@ static int __maybe_unused amd_pmc_suspend(struct device *dev) u32 arg = 1; /* Reset and Start SMU logging - to monitor the s0i3 stats */ - amd_pmc_send_cmd(pdev, 0, NULL, SMU_MSG_LOG_RESET, 0); - amd_pmc_send_cmd(pdev, 0, NULL, SMU_MSG_LOG_START, 0); + amd_pmc_send_cmd(pdev, 0, NULL, SMU_MSG_LOG_RESET, 0, PMC_MSG_PORT_PEP); + amd_pmc_send_cmd(pdev, 0, NULL, SMU_MSG_LOG_START, 0, PMC_MSG_PORT_PEP); /* Activate CZN specific RTC functionality */ if (pdev->cpu_id == AMD_CPU_ID_CZN) { @@ -542,7 +549,7 @@ static int __maybe_unused amd_pmc_suspend(struct device *dev) /* Dump the IdleMask before we send hint to SMU */ amd_pmc_idlemask_read(pdev, dev, NULL); msg = amd_pmc_get_os_hint(pdev); - rc = amd_pmc_send_cmd(pdev, arg, NULL, msg, 0); + rc = amd_pmc_send_cmd(pdev, arg, NULL, msg, 0, PMC_MSG_PORT_PEP); if (rc) dev_err(pdev->dev, "suspend failed\n"); @@ -559,12 +566,12 @@ static int __maybe_unused amd_pmc_resume(struct device *dev) u8 msg; msg = amd_pmc_get_os_hint(pdev); - rc = amd_pmc_send_cmd(pdev, 0, NULL, msg, 0); + rc = amd_pmc_send_cmd(pdev, 0, NULL, msg, 0, PMC_MSG_PORT_PEP); if (rc) dev_err(pdev->dev, "resume failed\n"); /* Let SMU know that we are looking for stats */ - amd_pmc_send_cmd(pdev, 0, NULL, SMU_MSG_LOG_DUMP_DATA, 0); + amd_pmc_send_cmd(pdev, 0, NULL, SMU_MSG_LOG_DUMP_DATA, 0, PMC_MSG_PORT_PEP); /* Dump the IdleMask to see the blockers */ amd_pmc_idlemask_read(pdev, dev, NULL);